The CMOS memory exists outside of the normal address space and cannot
contain directly executable code. It is reachable through IN and OUT
commands at port number 70h (112d) and 71h (113d). To read a CMOS byte,
an OUT to port 70h is executed with the address of the byte to be read and
an IN from port 71h will then retrieve the requested information. The
following BASIC fragment will read 128 CMOS bytes and print them to the
screen in 8 rows of 16 values.

The CMOS RAM space has an upper limit of 128 bytes because of the structure
of port 70: only bits 0-6 are used for addressing, bit 7 is used to
enable (0) or disable (1) Non-Maskable Interrupts (NMI) and explains why
IBM uses 80h OR <address> to read/write data & follows with  a "throw-away"
call.

Note that if the CMOS only has 64 bytes available, addressing will
generally wrap and addresses from 40h-7Fh will mirror 00h-3Fh. Output will
be hexadecimal.



The format of the ten clock data registers (bytes 00h-09h) is:

----------R00--------------------------------
CMOS 00h - RTC - SECONDS
Desc:   (BCD 00-59, Hex 00-3B)
Note: Bit 7 is read only
SeeAlso: CMOS 01h,CMOS 02h,CMOS 04h
----------R01--------------------------------
CMOS 01h - RTC - SECOND ALARM
Desc:   (BCD 00-59, Hex 00-3B; "don't care" if C0-FF)
SeeAlso: CMOS 00h,CMOS 03h,CMOS 05h,CMOS 7Dh
----------R02--------------------------------
CMOS 02h - RTC - MINUTES
Desc:   (BCD 00-59, Hex 00-3B)
SeeAlso: CMOS 00h,CMOS 03h,CMOS 04h
----------R03--------------------------------
CMOS 03h - RTC - MINUTE ALARM
Desc:   (BCD 00-59, Hex 00-3B; "don't care" if C0-FF))
SeeAlso: CMOS 00h,CMOS 02h,CMOS 05h,CMOS 7Dh,CMOS 7Eh"AMD-645"
----------R04--------------------------------
CMOS 04h - RTC - HOURS
Desc:   (BCD 00-23, Hex 00-17 if 24 hr mode)
        (BCD 01-12, Hex 01-0C if 12 hr am)
        (BCD 81-92. Hex 81-8C if 12 hr pm)
SeeAlso: CMOS 00h,CMOS 02h,CMOS 05h
----------R05--------------------------------
CMOS 05h - RTC - HOUR ALARM
Desc:   (same as hours; "don't care" if C0-FF))
SeeAlso: CMOS 01h,CMOS 03h,CMOS 04h
----------R06--------------------------------
CMOS 06h - RTC - DAY OF WEEK
Desc:   (01-07 Sunday=1)
SeeAlso: CMOS 07h,CMOS 08h,CMOS 09h
----------R07--------------------------------
CMOS 07h - RTC - DATE OF MONTH
Desc:   (BCD 01-31, Hex 01-1F)
SeeAlso: CMOS 06h,CMOS 08h,CMOS 09h
----------R08--------------------------------
CMOS 08h - RTC - MONTH
Desc:   (BCD 01-12, Hex 01-0C)
SeeAlso: CMOS 06h,CMOS 07h,CMOS 09h
----------R09--------------------------------
CMOS 09h - RTC - YEAR
Desc:   (BCD 00-99, Hex 00-63)
Notes:  BCD/Hex selection depends on Bit 2 of register B (0Bh)
        12/24 Hr selection depends on Bit 1 of register B (0Bh)
        Alarm will trigger when contents of all three Alarm byte registers
          match their companions.
SeeAlso: CMOS 06h,CMOS 07h,CMOS 08h

The following is the on-chip status register information.

----------R0A--------------------------------
CMOS 0Ah - RTC - STATUS REGISTER A (read/write) (usu 26h)

Bitfields for Real-Time Clock status register A:
Bit(s)  Description     (Table C0001)
 7      =1 time update cycle in progress, data ouputs undefined
        (bit 7 is read only)
 6-4    22 stage divider
        010 = 32768 Hz time base (default)
 3-0    rate selection bits for interrupt
        0000 none
        0011 122 microseconds (minimum)
        1111 500 milliseconds
        0110 976.562 microseconds (default 1024 Hz)
SeeAlso: #C0002,#C0003,#C0004
----------R0B--------------------------------
CMOS 0Bh - RTC - STATUS REGISTER B (read/write)

Bitfields for Real-Time Clock status register B:
Bit(s)  Description     (Table C0002)
 7      enable clock setting by freezing updates
 6      enable periodic interrupt
 5      enable alarm interrupt
 4      enable update-ended interrupt
 3      enable square wave output
 2      Data Mode - 0: BCD, 1: Binary
 1      24/12 hour selection - 1 enables 24 hour mode
 0      Daylight Savings Enable
        =1 enables automatic switching to/from DST in April and October
SeeAlso: #C0001,#C0003,#C0004
----------R0C--------------------------------
CMOS 0Ch - RTC - STATUS REGISTER C (Read only)

Bitfields for Real-Time Clock status register C:
Bit(s)  Description     (Table C0003)
 7      Interrupt request flag
        =1 when any or all of bits 6-4 are 1 and appropriate enables
          (Register B) are set to 1. Generates IRQ 8 when triggered.
 6      Periodic Interrupt flag
 5      Alarm Interrupt flag
 4      Update-Ended Interrupt Flag
 3-0    unused
SeeAlso: #C0001,#C0002,#C0004
----------R0D--------------------------------
CMOS 0Dh - RTC - STATUS REGISTER D (read only)

Bitfields for Real-Time Clock status register D:
Bit(s)  Description     (Table C0004)
 7      Valid RAM - 1 indicates batery power good, 0 if dead or disconnected.
 6-0    unused (0)





After that it's all over the place. Passwords, cache-control options...

What's 118 bytes of SRAM for? Well, what if you know you don't have any
other non-volatile storage? The BIOS is going to list floppies and so on
anyway.

For one thing, if the battery is low, you can check a constant in SPAM for
validity. I guess they do that themselves.

Hmmmmm. WELLLLL, proceed slowly with that, cause the unknown BIOS probably
uses it.

