I've spent a day with the INTeL pdf for the 8259A and I can't make any
sense out of the idea that edge-triggered interrupts can't be shared. The
8 or whatever IRQ lines are priority levels. What's on a particular level
is going to have to be polled regardless, if it's more than one thing.
The wallclock "discern" reflex, for example. 

IRQs need EOI in Ha3sm, IIRC.

FirstIRQ is up at 0x80 now because I though I was going to do a 16/32 IDT.
I may yet, but as of now I'm doing four of the boogers.
