tables and deprecations

Appendix A  Opcode Map

............................................................................

The opcode tables that follow aid in interpreting 80386 object code. Use
the high-order four bits of the opcode as an index to a row of the opcode
table; use the low-order four bits as an index to a column of the table. If
the opcode is 0FH, refer to the two-byte opcode table and use the second
byte of the opcode to index the rows and columns of that table.


Key to Abbreviations

Operands are identified by a two-character code of the form Zz. The first
character, an uppercase letter, specifies the addressing method; the second
character, a lowercase letter, specifies the type of operand.


Codes for Addressing Method

A  Direct address; the instruction has no modR/M byte; the address of the
   operand is encoded in the instruction; no base register, index register,
   or scaling factor can be applied; e.g., far JMP (EA).

C  The reg field of the modR/M byte selects a control register; e.g., MOV
   (0F20, 0F22).

D  The reg field of the modR/M byte selects a debug register; e.g., MOV
   (0F21,0F23).

E  A modR/M byte follows the opcode and specifies the operand. The operand
   is either a general register or a memory address. If it is a memory
   address, the address is computed from a segment register and any of the
   following values: a base register, an index register, a scaling factor,
   a displacement.

F  Flags Register.

G  The reg field of the modR/M byte selects a general register; e.g., ADD
   (00).

I  Immediate data. The value of the operand is encoded in subsequent bytes
   of the instruction.

J  The instruction contains a relative offset to be added to the
   instruction pointer register; e.g., JMP short, LOOP.

M  The modR/M byte may refer only to memory; e.g., BOUND, LES, LDS, LSS,
   LFS, LGS.

O  The instruction has no modR/M byte; the offset of the operand is coded as
   a word or double word (depending on address size attribute) in the
   instruction. No base register, index register, or scaling factor can be
   applied; e.g., MOV (A0-A3).

R  The mod field of the modR/M byte may refer only to a general register;
   e.g., MOV (0F20-0F24, 0F26).

S  The reg field of the modR/M byte selects a segment register; e.g., MOV
   (8C,8E).

T  The reg field of the modR/M byte selects a test register; e.g., MOV
   (0F24,0F26).

X  Memory addressed by DS:SI; e.g., MOVS, COMPS, OUTS, LODS, SCAS.

Y  Memory addressed by ES:DI; e.g., MOVS, CMPS, INS, STOS.


Codes for Operant Type

a  Two one-word operands in memory or two double-word operands in memory,
   depending on operand size attribute (used only by BOUND).

b  Byte (regardless of operand size attribute)

c  Byte or word, depending on operand size attribute.

d  Double word (regardless of operand size attribute)

p  32-bit or 48-bit pointer, depending on operand size attribute.

s  Six-byte pseudo-descriptor

v  Word or double word, depending on operand size attribute.

w  Word (regardless of operand size attribute)


Register Codes

When an operand is a specific register encoded in the opcode, the register
is identified by its name; e.g., AX, CL, or ESI. The name of the register
indicates whether the register is 32-, 16-, or 8-bits wide. A register
identifier of the form eXX is used when the width of the register depends on
the operand size attribute; for example, eAX indicates that the AX register
is used when the operand size attribute is 16 and the EAX register is used
when the operand size attribute is 32.


One-Byte Opcode Map


       0         1         2         3         4         5         6        7   
 r-----------------------------------------------------------,--------,--------,
 |                              ADD                          l  PUSH  l   POP  l
0L.........L.........L.........L.........L.........L.........|        l        L
 |  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l   ES   l   ES   l
 |---------L---------L---------L---------L---------L---------|--------|--------|
 |                              ADC                          l  PUSH  l   POP  l
1L.........L.........L.........L.........L.........L.........|        l        L
 |  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l   SS   l   SS   l
 |---------L---------L---------L---------L---------L---------|--------|--------|
 |                              AND                          l  SEG   l        l
2L.........L.........L.........L.........L.........L.........|        l   DAA  L
 |  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l  =ES   l        l
 |---------L---------L---------L---------L---------L---------|--------|--------|
 |                              XOR                          l  SEG   l        l
3L.........L.........L.........L.........L.........L.........|        l   AAA  L
 |  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l  =SS   l        l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                               INC general register                          l
4L.........L.........L.........L.........L.........L.........L........L........L
 |   eAX   l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l  eSI   l  eDI   l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                               PUSH general register                         l
5L.........L.........L.........L.........L.........L.........L........L........L
 |   eAX   l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l  eSI   l  eDI   l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l  BOUND  l  ARPL   l   SEG   l   SEG   l Operandl Addressl
6|  PUSHA  l  POPA   l         l         l         l         l        l        l
 |         l         l  Gv,Ma  l  Ew,Rw  l   =FS   l   =GS   l  Size  l  Size  l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                    Short displacement jump of condition (Jb)                l
7L.........L.........L.........L.........L.........L.........L........L........L
 |   JO    l   JNO   l   JB    l   JNB   l   JZ    l  JNZ    l   JBE  l  JNBE  l
 |---------L---------+---------+---------|---------L---------|--------L--------|
 |  Immediate Grpl   l         l  Grpl   l       TEST        l      XCNG       l
8L.........L.........|         l         L.........L.........L........L........L
 |  Eb,Ib  l  Ev,Iv  l         l  Ev,Iv  l  Eb,Gb  l  Ev,Gv  l  Eb,Gb l  Ev,Gv l
 +---------+---------L---------L---------L---------L---------L--------L--------|
 |         l              XCHG word or double-word register with eAX           l
9|   NOP   L.........L.........L.........L.........L.........L........L........|
 |         l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l  eSI   l  eDI   l
 |---------L---------L---------L---------+---------+---------|--------|--------|
 |                  MOV                  l  MOVSB  l MOVSW/D l CMPSB  lCMPSW/D l
AL.........L.........L.........L.........|         l         l        l        L
 |  AL,Ob  l  eAX,Ov l  Ob,AL  l  Ov,eAX l  Xb,Yb  l  Xv,Yv  l  Xb,Yb l  Xv,Yv l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                       MOV immediate byte into byte register                 l
BL.........L.........L.........L.........L.........L.........L........L........L
 |    AL   l   CL    l   DL    l   BL    l   AH    l   CH    l   DH   l   BH   l
 |---------L---------|---------L---------+---------+---------|--------L--------|
 |    Shift Grp2     l      RET near     l   LES   l   LDS   l       MOV       l
CL.........L.........L.........L.........|         l         L........L........|
 |  Eb,Ib  l  Ev,Iv  l    Iw   l         l  Gv,Mp  l  Gv,Mp  l  Eb,Ib l  Ev,Iv l
 |---------L---------L---------L---------+---------+---------|--------|--------|
 |               Shift Grp2              l         l         l        l        l
DL.........L.........L.........L.........|   AAM   l   AAD   l        l  XLAT  l
 |   Eb,1  l  Ev,1   l  Eb,CL  l  Ev,CL  l         l         l        l        l
 +---------+---------+---------+---------|---------L---------|--------L--------|
 | LOOPNE  l  LOOPE  l   LOOP  l  JCXZ   l        IN         l       OUT       l
E|         l         l         l         L.........L.........L........L........|
 |   Jb    l   Jb    l    Jb   l   Jb    l  AL,Ib  l eAX,Ib  l  Ib,AL l Ib,eAX l
 +---------+---------+---------+---------+---------+---------|--------L--------|
 |         l         l         l   REP   l         l         l     Unary Grp3  l
F|  LOCK   l         l  REPNE  l         l   HLT   l   CMC   L........L........|
 |         l         l         l  REPE   l         l         l   Eb   l   Ev   l
 `---------L---------L---------L---------L---------L---------L--------L--------L





      8         9         A         B         C         D         E        F
,-----------------------------------------------------------,--------,--------L
l                             OR                            l  PUSH  l 2-byte |
L.........L.........L.........L.........L.........L.........|        l        |
l  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l   CS   l escape |
|---------L---------L---------L---------L---------L---------|--------|--------|
l                            SBB                            l  PUSH  l  POP   |
L.........L.........L.........L.........L.........L.........|        l        |
l  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l   DS   l   DS   |
|---------L---------L---------L---------L---------L---------|--------|--------|
l                            SUB                            l  SEG   l        |
L.........L.........L.........L.........L.........L.........|        l  DAS   |
l  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l  =CS   l        |
|---------L---------L---------L---------L---------L---------|--------|--------|
l                            CMP                            l  SEG   l        |
L.........L.........L.........L.........L.........L.........|        l  AAS   |
l  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  AL,Ib  l eAX,Iv  l  =CS   l        |
|---------L---------L---------L---------L---------L---------L--------L--------|
l                              DEC general register                           |
L.........L.........L.........L.........L.........L.........L........L........|
l   eAX   l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l   eSI  l  eDI   |
|---------L---------L---------L---------L---------L---------L--------L--------|
l                          POP into general register                          |
L.........L.........L.........L.........L.........L.........L........L........|
l   eAX   l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l  eSI   l  eDI   |
+---------+---------+---------+---------+---------+---------|--------|--------|
l  PUSH   l  IMUL   l  PUSH   l  IMUL   l  INSB   l INSW/D  l OUTSB  lOUTSW/D |
l         l         l         l         l         l         l        l        |
l   Ib    l GvEvIv  l   Ib    l GvEvIv  l  Yb,DX  l  Yb,DX  l Dx,Xb  l DX,Xv  |
|---------L---------L---------L---------L---------L---------L--------L--------|
l                   Short-displacement jump on condition(Jb)                  |
L.........L.........L.........L.........L.........L.........L........L........|
l   JS    l   JNS   l   JP    l   JNP   l   JL    l  JNL    l  JLE   l  JNLE  |
|---------L---------L---------L---------+---------+---------|--------|--------|
l                 MOV                   l   MOV   l   LEA   l  MOV   l  POP   |
L.........L.........L.........L.........|         l         l        l        |
l  Eb,Gb  l  Ev,Gv  l  Gb,Eb  l  Gv,Ev  l  Ew,Sw  l  Gv,M   l  Sw,Ew l   Ev   |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l  CALL   l         l  PUSHF  l  POPF   l        l        |
|   CBW   l   CWD   l         l  WAIT   l         l         l  SAHF  l  LAHF  |
l         l         l   Ap    l         l   Fv    l   Fv    l        l        |
|---------L---------+---------+---------+---------+---------|--------|--------|
l       TEST        l  STOSB  l STOSW/D l  LODSB  l LODSW/D l SCASB  lSCASW/D |
L.........L.........|         l         l         l         l        l        |
l  AL,Ib  l eAX,Iv  l  Yb,AL  l  Yv,eAX l  AL,Xb  l eAX,Xv  l  AL,Xb leAX,Xv  |
|---------L---------L---------L---------L---------L---------L--------L--------|
l        MOV immediate word or double into word or double register            |
L.........L.........L.........L.........L.........L.........L........L........|
l   eAX   l   eCX   l   eDX   l   eBX   l   eSP   l   eBP   l   eSI  l  eDI   |
+---------+---------|---------L---------+---------+---------|--------|--------|
l  ENTER  l         l      RET far      l  INT    l  INT    l        l        |
|         l  LEAVE  L.........L.........|         l         l  INTO  l  IRET  |
l  Iw,Ib  l         l   Iw    l         l   3     l  Ib     l        l        |
|---------L---------L---------L---------L---------L---------L--------L--------|
l                                                                             |
l                  ESC(Escape to coprocessor instruction set)                 |
l                                                                             |
|---------,-----------------------------,-------------------,-----------------|
l   CALL  l             JNP             l        IN         l       OUT       |
|         L.........L.........L.........L.........L.........L........L........|
l    Av   l   Jv    l   Ap    l   Jb    l  AL,DX  l eAX,DX  l DX,AL  l DX,eAX |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         lINC/DEC lIndirct |
|   CLC   l   STC   l   CLI   l   STI   l   CLD   l   STD   l        l        |
l         l         l         l         l         l         l  Grp4  l  Grp5  |
L---------L---------L---------L---------L---------L---------L--------L--------'




Two-Byte Opcode Map (first byte is 0FH)





      0         1         2         3         4         5         6        7    
 r---------,---------,---------,---------,---------,---------,--------,--------,
 |         l         l   LAR   l   LSL   l         l         l        l        l
0|  Grp6   l  Grp7   l         l         l         l         l  CLTS  l        l
 |         l         l  Gw,Ew  l  Gv,Ew  l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
1|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |   MOV   l   MOV   l   MOV   l   MOV   l   MOV   l         l   MOV  l        l
2|         l         l         l         l         l         l        l        l
 |  Cd,Rd  l  Dd,Rd  l  Rd,Cd  l  Rd,Dd  l  Td,Rd  l         l  Rd,Td l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
3|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
4|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
5|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
6|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
7|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                      Long-displacement jump on condition (Jv)               l
8L.........L.........L.........L.........L.........L.........L........L........L
 |   JO    l   JNO   l   JB    l   JNB   l   JZ    l   JNZ   l   JBE  l  JNBE  l
 |---------L---------L---------L---------L---------L---------L--------L--------|
 |                              Byte Set on condition (Eb)                     l
9L.........L.........L.........L.........L.........L.........L........L........|
 |  SETO   l  SETNO  l  SETB   l  SETNB  l  SETZ   l  SETNZ  l  SETBE l SETNBE l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |  PUSH   l   POP   l         l   BT    l  SHLD   l  SHLD   l        l        l
A|         l         l         l         l         l         l        l        l
 |   FS    l   FS    l         l  Ev,Gv  l EvGvIb  l EvGvCL  l        l        l
 +---------+---------+---------+---------+---------+---------|--------L--------|
 |         l         l   LSS   l   BTR   l   LFS   l   LGS   l      MOVZX      l
B|         l         l         l         l         l         L........L........|
 |         l         l   Mp    l  Ev,Gv  l   Mp    l   Mp    l Gv,Eb  l Gv,Ew  l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
C|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
D|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
E|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 +---------+---------+---------+---------+---------+---------|--------|--------|
 |         l         l         l         l         l         l        l        l
F|         l         l         l         l         l         l        l        l
 |         l         l         l         l         l         l        l        l
 |---------L---------L---------L---------L---------L---------L--------L--------L



     8         9         A         B         C         D         E        F
,---------,---------,---------,---------,---------,---------,--------,--------L
l         l         l         l         l         l         l        l        |
0         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
1         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
2         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
3         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
4         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
5         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
6         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
7         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
|---------L---------L---------L---------L---------L---------L--------L--------|
l                 Long-displacement jump on condition (Jv)                    |
8.........L.........L.........L.........L.........L.........L........L........|
l   JS    l   JNS   l   JP    l   JNP   l   JL    l   JNL   l   JLE  l  JNLE  |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
9  SETS   l  SETNS  l  SETP   l  SETNP  l  SETL   l  SETNL  l  SETLE l SETNLE |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l  PUSH   l   POP   l         l   BTS   l  SHRD   l  SHRD   l        l  IMUL  |
A         l         l         l         l         l         l        l        |
l   GS    l   GS    l         l  Ev,Gv  l EvGvIb  l EvGvCL  l        l Gv,Ev  |
+---------+---------+---------+---------+---------+---------|--------L--------|
l         l         l  Grp-8  l   BTC   l   BSF   l   BSR   l      MOVSX      |
B         l         l         l         l         l         L.................|
l         l         l  Ev,Ib  l  Ev,Gv  l  Gv,Ev  l  Gv,Ev  l  Gv,Eb   Gv,Ew  |
+---------+---------+---------+---------+---------+---------|--------,--------|
l         l         l         l         l         l         l        l        |
C         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
D         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
E         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
+---------+---------+---------+---------+---------+---------|--------|--------|
l         l         l         l         l         l         l        l        |
F         l         l         l         l         l         l        l        |
l         l         l         l         l         l         l        l        |
L----8---------9---------A---------B----+----C---------D---------E--------F---'






Opcodes determined by bits 5,4,3 of modR/M byte:

     G                       /.......L.......L.......\
     r                       l  mod  l  nnn  l  R/M  l
     o                       L.......L.......L.......|
     u
     p   000     001     010     011     100     101     110     111
      /.......L.......L.......L.......L.......L.......L.......L.......\
     1l  ADD  l  OR   l  ADC  l  SBB  l  AND  l  SUB  l  XOR  l  CMP  l
      l       l       l       l       l       l       l       l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     2l  ROL  l  ROR  l  RCL  l  RCR  l  SHL  l  SHR  l       l  SAR  l
      l       l       l       l       l       l       l       l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     3l TEST  l       l  NOT  l  NEG  l  MUL  l IMUL  l  DIV  l IDIV  l
      l Ib/Iv l       l       l       lAL/eAX lAL/eAX lAL/eAX lAL/eAX l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     4l  INC  l  DEC  l       l       l       l       l       l       l
      l  Eb   l  Eb   l       l       l       l       l       l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     5l  INC  l  DEC  l CALL  l CALL  l  JMP  l  JMP  l PUSH  l       l
      l  Ev   l  Ev   l  Ev   l  eP   l  Ev   l  Ep   l  Ev   l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|


Opcodes determined by bits 5,4,3 of modR/M byte:

     G                       /.......L.......L.......\
     r                       l  mod  l  nnn  l  R/M  l
     o                       L.......L.......L.......|
     u
     p   000     001     010     011     100     101     110     111
      /.......L.......L.......L.......L.......L.......L.......L.......\
     6l SLDT  l  STR  l LLDT  l  LTR  l VERR  l VERW  l       l       l
      l  Ew   l  Ew   l  Ew   l  Ew   l  Ew   l  Ew   l       l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     7l SGDT  l SIDT  l LGDT  l LIDT  l SMSW  l       l LMSW  l       l
      l  Ms   l  Ms   l  Ms   l   Ms  l  Ew   l       l  Ew   l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|
     8l       l       l       l       l  BT   l  BTS  l  BTR  l  BTC  l
      l       l       l       l       l       l       l       l       l
      L.......L.......L.......L.......L.......L.......L.......L.......|


Appendix B  Complete Flag Cross-Reference

............................................................................

Key to Codes

T     = instruction tests flag

M     = instruction modifies flag
	(either sets or resets depending on operands)

0     = instruction resets flag

1     = instruction sets flag

..    = instruction's effect on flag is undefined

R     = instruction restores prior value of flag

blank = instruction does not affect flag


Instruction            OF   SF   ZF   AF   PF   CF   TF   IF   DF   NT   RF

AAA                    ..   ..   ..   TM   ..   M
AAD                    ..   M    M    ..   M    ..
AAM                    ..   M    M    ..   M    ..
AAS                    ..   ..   ..   TM   ..   M
ADC                    M    M    M    M    M    TM
ADD                    M    M    M    M    M    M
AND                    0    M    M    ..   M    0
ARPL                             M
BOUND
BSF/BSR                ..   ..   M    ..   ..   ..
BT/BTS/BTR/BTC         ..   ..   ..   ..   ..   M
CALL
CBW
CLC                                             0
CLD                                                            0
CLI                                                       0
CLTS
CMC                                             M
CMP                    M    M    M    M    M    M
CMPS                   M    M    M    M    M    M              T
CWD
DAA                    ..   M    M    TM   M    TM
DAS                    ..   M    M    TM   M    TM
DEC                    M    M    M    M    M
DIV                    ..   ..   ..   ..   ..   ..
ENTER
ESC
HLT
IDIV                   ..   ..   ..   ..   ..   ..
IMUL                   M    ..   ..   ..   ..   M
IN
INC                    M    M    M    M    M
INS                                                            T
INT                                                  0              0
INTO                   T                             0              0
IRET                   R    R    R    R    R    R    R    R    R    T
Jcond                  T    T    T    T    T
JCXZ
JMP
LAHF
LAR                              M
LDS/LES/LSS/LFS/LGS
LEA
LEAVE
LGDT/LIDT/LLDT/LMSW
LOCK
LODS                                                           T
LOOP
LOOPE/LOOPNE                     T
LSL                              M
LTR
MOV
MOV control, debug     ..   ..   ..   ..   ..   ..
MOVS                                                           T
MOVSX/MOVZX
MUL                    M    ..   ..   ..   ..   M
NEG                    M    M    M    M    M    M
NOP
NOT
OR                     0    M    M    ..   M    0
OUT
OUTS                                                           T
POP/POPA
POPF                   R    R    R    R    R    R    R    R    R    R
PUSH/PUSHA/PUSHF
RCL/RCR 1              M                        TM
RCL/RCR count          ..                       TM
REP/REPE/REPNE
RET
ROL/ROR 1              M                        M
ROL/ROR count          ..                       M
SAHF                        R    R    R    R    R
SAL/SAR/SHL/SHR 1      M    M    M    ..   M    M
SAL/SAR/SHL/SHR count  ..   M    M    ..   M    M
SBB                    M    M    M    M    M    TM
SCAS                   M    M    M    M    M    M              T
SET cond               T    T    T         T    T
SGDT/SIDT/SLDT/SMSW
SHLD/SHRD              ..   M    M    ..   M    M
STC                                             1
STD                                                            1
STI                                                       1
STOS                                                           T
STR
SUB                    M    M    M    M    M    M
TEST                   0    M    M    ..   M    0
VERR/VERRW                       M
WAIT
XCHG
XLAT
XOR                    0    M    M    ..   M    0


Appendix C  Status Flag Summary

............................................................................

Status Flags' Functions

Bit  Name   Function

 0   CF     Carry Flag .. Set on high-order bit carry or borrow; cleared
	    otherwise.
 2   PF     Parity Flag .. Set if low-order eight bits of result contain
	    an even number of 1 bits; cleared otherwise.
 4   AF     Adjust flag .. Set on carry from or borrow to the low order
	    four bits of   AL; cleared otherwise. Used for decimal
	    arithmetic.
 6   ZF     Zero Flag .. Set if result is zero; cleared otherwise.
 7   SF     Sign Flag .. Set equal to high-order bit of result (0 is
	    positive, 1 if negative).
11   OF     Overflow Flag .. Set if result is too large a positive number
	    or too small a negative number (excluding sign-bit) to fit in
	    destination operand; cleared otherwise.

Key to Codes

T     = instruction tests flag
M     = instruction modifies flag
	(either sets or resets depending on operands)
0     = instruction resets flag
..    = instruction's effect on flag is undefined
blank = instruction does not affect flag



Instruction            OF   SF   ZF   AF   PF   CF
AAA                    ..   ..   ..   TM   ..   M
AAS                    ..   ..   ..   TM   ..   M
AAD                    ..   M    M    ..   M    ..
AAM                    ..   M    M    ..   M    ..
DAA                    ..   M    M    TM   M    TM
DAS                    ..   M    M    TM   M    TM
ADC                    M    M    M    M    M    TM
ADD                    M    M    M    M    M    M
SBB                    M    M    M    M    M    TM
SUB                    M    M    M    M    M    M
CMP                    M    M    M    M    M    M
CMPS                   M    M    M    M    M    M
SCAS                   M    M    M    M    M    M
NEG                    M    M    M    M    M    M
DEC                    M    M    M    M    M
INC                    M    M    M    M    M
IMUL                   M    ..   ..   ..   ..   M
MUL                    M    ..   ..   ..   ..   M
RCL/RCR 1              M                        TM
RCL/RCR count          ..                       TM
ROL/ROR 1              M                        M
ROL/ROR count          ..                       M
SAL/SAR/SHL/SHR 1      M    M    M    ..   M    M
SAL/SAR/SHL/SHR count  ..   M    M    ..   M    M
SHLD/SHRD              ..   M    M    ..   M    M
BSF/BSR                ..   ..   M    ..   ..   ..
BT/BTS/BTR/BTC         ..   ..   ..   ..   ..   M
AND                    0    M    M    ..   M    0
OR                     0    M    M    ..   M    0
TEST                   0    M    M    ..   M    0
XOR                    0    M    M    ..   M    0


Appendix D  Condition Codes

...........................................................................

...........................................................................
Note:
  The terms "above" and "below" refer to the relation between two
  unsigned values (neither SF nor OF is tested). The terms "greater" and
  "less" refer to the relation between two signed values (SF and OF are
  tested).
...........................................................................

Definition of Conditions

(For conditional instructions Jcond, and SETcond)


				       Instruction  Condition
Mnemonic  Meaning                      Subcode      Tested

O         Overflow                     0000         OF = 1

NO        No overflow                  0001         OF = 0

B         Below
NAE       Neither above nor equal      0010         CF = 1

NB        Not below
AE       Above or equal                0011         CF = 0

E         Equal
Z         Zero                         0100         ZF = 1

NE        Not equal
NZ        Not zero                     0101         ZF = 0

BE        Below or equal
NA        Not above                    0110         (CF or ZF) = 1

NBE       Neither below nor equal
NA        Above                        0111         (CF or ZF) = 0

S         Sign                         1000         SF = 1

NS        No sign                      1001         SF = 0

P         Parity
PE        Parity even                  1010         PF = 1

NP        No parity
PO        Parity odd                   1011         PF = 0

L         Less
NGE       Neither greater nor equal    1100         (SF xor OF) = 1

NL        Not less
GE        Greater or equal             1101         (SF xor OF) = 0

LE        Less or equal
NG        Not greater                  1110         ((SF xor OF) or ZF) = 1

NLE       Neither less nor equal
G         Greater                      1111         ((SF xor OF) or ZF) = 0





DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE
DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE
DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE
DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE DE$PRECATION ZONE
Stuff I moved to here		(Rick)


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AAA .. ASCII Adjust after Addition

Opcode    Instruction    Clocks    Description

37        AAA            4         ASCII adjust AL after addition


Operation

IF ((AL AND 0FH) > 9) OR (AF = 1)
THEN
   AL <! (AL + 6) AND 0FH;
   AH <! AH + 1;
   AF <! 1;
   CF <! 1;
ELSE
   CF <! 0;
   AF <! 0;
FI;

Description

Execute AAA only following an ADD instruction that leaves a byte result
in the AL register. The lower nibbles of the operands of the ADD instruction
should be in the range 0 through 9 (BCD digits). In this case, AAA adjusts
AL to contain the correct decimal digit result. If the addition produced a
decimal carry, the AH register is incremented, and the carry and auxiliary
carry flags are set to 1. If there was no decimal carry, the carry and
auxiliary flags are set to 0 and AH is unchanged. In either case, AL is left
with its top nibble set to 0. To convert AL to an ASCII result, follow the
AAA instruction with OR AL, 30H.

Flags Affected

AF and CF as described above; OF, SF, ZF, and PF are undefined

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


AAD .. ASCII Adjust AX before Division

Opcode    Instruction    Clocks    Description

D5 0A     AAD            19        ASCII adjust AX before division


Operation

AL <! AH * 10 + AL;
AH <! 0;

Description

AAD is used to prepare two unpacked BCD digits (the least-significant
digit in AL, the most-significant digit in AH) for a division operation that
will yield an unpacked result. This is accomplished by setting AL to
AL + (10 * AH), and then setting AH to 0. AX is then equal to the binary
equivalent of the original unpacked two-digit number.

Flags Affected

SF, ZF, and PF as described in Appendix C; OF, AF, and CF are undefined

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


AAM .. ASCII Adjust AX after Multiply

Opcode    Instruction    Clocks    Description

D4 0A     AAM            17        ASCII adjust AX after multiply


Operation

AH <! AL / 10;
AL <! AL MOD 10;

Description

Execute AAM only after executing a MUL instruction between two unpacked
BCD digits that leaves the result in the AX register. Because the result is
less than 100, it is contained entirely in the AL register. AAM unpacks the
AL result by dividing AL by 10, leaving the quotient (most-significant
digit) in AH and the remainder (least-significant digit) in AL.

Flags Affected

SF, ZF, and PF as described in Appendix C; OF, AF, and CF are undefined

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


AAS .. ASCII Adjust AL after Subtraction

Opcode    Instruction    Clocks    Description

3F        AAS            4         ASCII adjust AL after subtraction


Operation

IF (AL AND 0FH) > 9 OR AF = 1
THEN
   AL <! AL - 6;
   AL <! AL AND 0FH;
   AH <! AH - 1;
   AF <! 1;
   CF <! 1;
ELSE
   CF <! 0;
   AF <! 0;
FI;

Description

Execute AAS only after a SUB instruction that leaves the byte result in the
AL register. The lower nibbles of the operands of the SUB instruction must
have been in the range 0 through 9 (BCD digits). In this case, AAS adjusts
AL so it contains the correct decimal digit result. If the subtraction
produced a decimal carry, the AH register is decremented, and the carry and
auxiliary carry flags are set to 1. If no decimal carry occurred, the carry
and auxiliary carry flags are set to 0, and AH is unchanged. In either case,
AL is left with its top nibble set to 0. To convert AL to an ASCII result,
follow the AAS with OR AL, 30H.

Flags Affected

AF and CF as described above; OF, SF, ZF, and PF are undefined

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


DAA .. Decimal Adjust AL after Addition

Opcode    Instruction        Clocks   Description

27        DAA                4        Decimal adjust AL after addition


Operation

IF ((AL AND 0FH) > 9) OR (AF = 1)
THEN
   AL <! AL + 6;
   AF <! 1;
ELSE
   AF <! 0;
FI;
IF (AL > 9FH) OR (CF = 1)
THEN
   AL <! AL + 60H;
   CF <! 1;
ELSE CF <! 0;
FI;

Description

Execute DAA only after executing an ADD instruction that leaves a
two-BCD-digit byte result in the AL register. The ADD operands should
consist of two packed BCD digits. The DAA instruction adjusts AL to
contain the correct two-digit packed decimal result.

Flags Affected

AF and CF as described above; SF, ZF, PF, and CF as described in
Appendix C.

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


DAS .. Decimal Adjust AL after Subtraction

Opcode    Instruction        Clocks   Description

2F        DAS                4        Decimal adjust AL after subtraction


Operation

IF (AL AND 0FH) > 9 OR AF = 1
THEN
   AL <! AL - 6;
   AF <! 1;
ELSE
   AF <! 0;
FI;
IF (AL > 9FH) OR (CF = 1)
THEN
   AL <! AL - 60H;
   CF <! 1;
ELSE CF <! 0;
FI;

Description

Execute DAS only after a subtraction instruction that leaves a
two-BCD-digit byte result in the AL register. The operands should consist
of two packed BCD digits. DAS adjusts AL to contain the correct packed
two-digit decimal result.

Flags Affected

AF and CF as described above; SF, ZF, and PF as described in Appendix C.

Protected Mode Exceptions

None

Real Address Mode Exceptions

None

Virtual 8086 Mode Exceptions

None


BYTE 3 




BCD:
A byte (unpacked) representation of a decimal digit in the range0 through
9. Unpacked decimal numbers are stored as unsigned byte quantities. One
digit is stored in each byte. The magnitude of the number is determined from
the low-order half-byte; hexadecimal values 0-9 are valid and are
interpreted as decimal numbers. The high-order half-byte must be zero for
multiplication and division; it may contain any value for addition and
subtraction.

Packed BCD:
A byte (packed) representation of two decimal digits, each in the range
0 through 9. One digit is stored in each half-byte. The digit in the
high-order half-byte is the most significant. Values 0-9 are valid in each
half-byte. The range of a packed decimal byte is 0-99.



