LLVM API Documentation

ARMISelLowering.cpp File Reference

#include "ARM.h"
#include "ARMAddressingModes.h"
#include "ARMConstantPoolValue.h"
#include "ARMISelLowering.h"
#include "ARMMachineFunctionInfo.h"
#include "ARMRegisterInfo.h"
#include "ARMSubtarget.h"
#include "ARMTargetMachine.h"
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/Instruction.h"
#include "llvm/Intrinsics.h"
#include "llvm/GlobalValue.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/ADT/VectorExtras.h"
#include "llvm/Support/MathExtras.h"

Include dependency graph for ARMISelLowering.cpp:

Go to the source code of this file.

Functions

static ARMCC::CondCodes IntCCToARMCC (ISD::CondCode CC)
 IntCCToARMCC - Convert a DAG integer condition code to an ARM CC.
static bool FPCCToARMCC (ISD::CondCode CC, ARMCC::CondCodes &CondCode, ARMCC::CondCodes &CondCode2)
static void HowToPassArgument (MVT ObjectVT, unsigned NumGPRs, unsigned StackOffset, unsigned &NeededGPRs, unsigned &NeededStackSize, unsigned &GPRPad, unsigned &StackPad, ISD::ArgFlagsTy Flags)
static SDValue LowerRET (SDValue Op, SelectionDAG &DAG)
static SDValue LowerConstantPool (SDValue Op, SelectionDAG &DAG)
static bool GVIsIndirectSymbol (GlobalValue *GV, Reloc::Model RelocM)
static SDValue LowerINTRINSIC_WO_CHAIN (SDValue Op, SelectionDAG &DAG)
static SDValue LowerVASTART (SDValue Op, SelectionDAG &DAG, unsigned VarArgsFrameIndex)
static SDValue LowerFORMAL_ARGUMENT (SDValue Op, SelectionDAG &DAG, unsigned ArgNo, unsigned &NumGPRs, unsigned &ArgOffset)
static bool isFloatingPointZero (SDValue Op)
 isFloatingPointZero - Return true if this is +0.0.
static bool isLegalCmpImmediate (unsigned C, bool isThumb)
static SDValue getARMCmp (SDValue LHS, SDValue RHS, ISD::CondCode CC, SDValue &ARMCC, SelectionDAG &DAG, bool isThumb)
static SDValue getVFPCmp (SDValue LHS, SDValue RHS, SelectionDAG &DAG)
 Returns a appropriate VFP CMP (fcmp{s|d}+fmstat) for the given operands.
static SDValue LowerSELECT_CC (SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST)
static SDValue LowerBR_CC (SDValue Op, SelectionDAG &DAG, const ARMSubtarget *ST)
static SDValue LowerFP_TO_INT (SDValue Op, SelectionDAG &DAG)
static SDValue LowerINT_TO_FP (SDValue Op, SelectionDAG &DAG)
static SDValue LowerFCOPYSIGN (SDValue Op, SelectionDAG &DAG)
static SDValue ExpandBIT_CONVERT (SDNode *N, SelectionDAG &DAG)
static SDValue ExpandSRx (SDNode *N, SelectionDAG &DAG, const ARMSubtarget *ST)
static SDValue PerformFMRRDCombine (SDNode *N, TargetLowering::DAGCombinerInfo &DCI)
 PerformFMRRDCombine - Target-specific dag combine xforms for ARMISD::FMRRD.
static bool isLegalAddressImmediate (int64_t V, MVT VT, const ARMSubtarget *Subtarget)
static bool getIndexedAddressParts (SDNode *Ptr, MVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG)


Function Documentation

static SDValue ExpandBIT_CONVERT ( SDNode *  N,
SelectionDAG &  DAG 
) [static]

static SDValue ExpandSRx ( SDNode *  N,
SelectionDAG &  DAG,
const ARMSubtarget *  ST 
) [static]

static bool FPCCToARMCC ( ISD::CondCode  CC,
ARMCC::CondCodes &  CondCode,
ARMCC::CondCodes &  CondCode2 
) [static]

static SDValue getARMCmp ( SDValue  LHS,
SDValue  RHS,
ISD::CondCode  CC,
SDValue &  ARMCC,
SelectionDAG &  DAG,
bool  isThumb 
) [static]

static bool getIndexedAddressParts ( SDNode *  Ptr,
MVT  VT,
bool  isSEXTLoad,
SDValue &  Base,
SDValue &  Offset,
bool &  isInc,
SelectionDAG &  DAG 
) [static]

static SDValue getVFPCmp ( SDValue  LHS,
SDValue  RHS,
SelectionDAG &  DAG 
) [static]

Returns a appropriate VFP CMP (fcmp{s|d}+fmstat) for the given operands.

Definition at line 1115 of file ARMISelLowering.cpp.

References llvm::ARMISD::CMPFP, llvm::ARMISD::CMPFPw0, llvm::MVT::Flag, llvm::ARMISD::FMSTAT, llvm::SelectionDAG::getNode(), and isFloatingPointZero().

Referenced by LowerBR_CC(), LowerFCOPYSIGN(), and LowerSELECT_CC().

static bool GVIsIndirectSymbol ( GlobalValue *  GV,
Reloc::Model  RelocM 
) [static]

GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol even in non-static mode.

Definition at line 834 of file ARMISelLowering.cpp.

References llvm::GlobalValue::hasCommonLinkage(), llvm::GlobalValue::hasHiddenVisibility(), llvm::GlobalValue::hasNotBeenReadFromBitcode(), llvm::GlobalValue::isDeclaration(), llvm::GlobalValue::mayBeOverridden(), and llvm::Reloc::Static.

static void HowToPassArgument ( MVT  ObjectVT,
unsigned  NumGPRs,
unsigned  StackOffset,
unsigned &  NeededGPRs,
unsigned &  NeededStackSize,
unsigned &  GPRPad,
unsigned &  StackPad,
ISD::ArgFlagsTy  Flags 
) [static]

static ARMCC::CondCodes IntCCToARMCC ( ISD::CondCode  CC  )  [static]

static bool isFloatingPointZero ( SDValue  Op  )  [static]

isFloatingPointZero - Return true if this is +0.0.

Definition at line 1034 of file ARMISelLowering.cpp.

References CP, llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::ISD::isEXTLoad(), llvm::ISD::isNON_EXTLoad(), and llvm::ARMISD::Wrapper.

Referenced by getVFPCmp().

static bool isLegalAddressImmediate ( int64_t  V,
MVT  VT,
const ARMSubtarget *  Subtarget 
) [static]

isLegalAddressImmediate - Return true if the integer value can be used as the offset of the target addressing mode for load / store of the given type.

Definition at line 1554 of file ARMISelLowering.cpp.

References llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::getSimpleVT(), llvm::ARMSubtarget::hasVFP2(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::ARMSubtarget::isThumb(), and Scale.

Referenced by llvm::ARMTargetLowering::isLegalAddressingMode().

static bool isLegalCmpImmediate ( unsigned  C,
bool  isThumb 
) [static]

Definition at line 1049 of file ARMISelLowering.cpp.

References llvm::ARM_AM::getSOImmVal().

Referenced by getARMCmp().

static SDValue LowerBR_CC ( SDValue  Op,
SelectionDAG &  DAG,
const ARMSubtarget *  ST 
) [static]

static SDValue LowerConstantPool ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerFCOPYSIGN ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerFORMAL_ARGUMENT ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  ArgNo,
unsigned &  NumGPRs,
unsigned &  ArgOffset 
) [static]

static SDValue LowerFP_TO_INT ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerINT_TO_FP ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerINTRINSIC_WO_CHAIN ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerRET ( SDValue  Op,
SelectionDAG &  DAG 
) [static]

static SDValue LowerSELECT_CC ( SDValue  Op,
SelectionDAG &  DAG,
const ARMSubtarget *  ST 
) [static]

static SDValue LowerVASTART ( SDValue  Op,
SelectionDAG &  DAG,
unsigned  VarArgsFrameIndex 
) [static]

static SDValue PerformFMRRDCombine ( SDNode *  N,
TargetLowering::DAGCombinerInfo &  DCI 
) [static]

PerformFMRRDCombine - Target-specific dag combine xforms for ARMISD::FMRRD.

Definition at line 1531 of file ARMISelLowering.cpp.

References llvm::TargetLowering::DAGCombinerInfo::CombineTo(), llvm::ARMISD::FMDRR, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::SDNode::getOperand().

Referenced by llvm::ARMTargetLowering::PerformDAGCombine().