LLVM API Documentation
#include "ARM.h"#include "ARMAddressingModes.h"#include "ARMConstantPoolValue.h"#include "ARMISelLowering.h"#include "ARMMachineFunctionInfo.h"#include "ARMRegisterInfo.h"#include "ARMSubtarget.h"#include "ARMTargetMachine.h"#include "llvm/CallingConv.h"#include "llvm/Constants.h"#include "llvm/Instruction.h"#include "llvm/Intrinsics.h"#include "llvm/GlobalValue.h"#include "llvm/CodeGen/MachineBasicBlock.h"#include "llvm/CodeGen/MachineFrameInfo.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/CodeGen/SelectionDAG.h"#include "llvm/Target/TargetOptions.h"#include "llvm/ADT/VectorExtras.h"#include "llvm/Support/MathExtras.h"
Go to the source code of this file.
| static SDValue ExpandBIT_CONVERT | ( | SDNode * | N, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 1352 of file ARMISelLowering.cpp.
References llvm::ISD::BUILD_PAIR, llvm::ISD::EXTRACT_ELEMENT, llvm::MVT::f64, llvm::ARMISD::FMDRR, llvm::ARMISD::FMRRD, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), llvm::SDValue::getValue(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), llvm::MVT::i32, and llvm::MVT::i64.
Referenced by llvm::ARMTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::ReplaceNodeResults().
| static SDValue ExpandSRx | ( | SDNode * | N, | |
| SelectionDAG & | DAG, | |||
| const ARMSubtarget * | ST | |||
| ) | [static] |
Definition at line 1371 of file ARMISelLowering.cpp.
References llvm::ISD::BUILD_PAIR, llvm::ISD::EXTRACT_ELEMENT, llvm::MVT::Flag, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::SDValue::getValue(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), llvm::MVT::i32, llvm::MVT::i64, llvm::ARMSubtarget::isThumb(), llvm::ARMISD::RRX, llvm::ISD::SRA, llvm::ARMISD::SRA_FLAG, llvm::ISD::SRL, and llvm::ARMISD::SRL_FLAG.
Referenced by llvm::ARMTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::ReplaceNodeResults().
| static bool FPCCToARMCC | ( | ISD::CondCode | CC, | |
| ARMCC::CondCodes & | CondCode, | |||
| ARMCC::CondCodes & | CondCode2 | |||
| ) | [static] |
FPCCToARMCC - Convert a DAG fp condition code to an ARM CC. It returns true if the operands should be inverted to form the proper comparison.
Definition at line 331 of file ARMISelLowering.cpp.
References llvm::ARMCC::AL, llvm::ARMCC::EQ, llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::HI, llvm::ARMCC::LE, llvm::ARMCC::LT, llvm::ARMCC::MI, llvm::ARMCC::NE, llvm::ARMCC::PL, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETOEQ, llvm::ISD::SETOGE, llvm::ISD::SETOGT, llvm::ISD::SETOLE, llvm::ISD::SETOLT, llvm::ISD::SETONE, llvm::ISD::SETUEQ, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUNE, llvm::ISD::SETUO, llvm::ARMCC::VC, and llvm::ARMCC::VS.
Referenced by LowerBR_CC(), and LowerSELECT_CC().
| static SDValue getARMCmp | ( | SDValue | LHS, | |
| SDValue | RHS, | |||
| ISD::CondCode | CC, | |||
| SDValue & | ARMCC, | |||
| SelectionDAG & | DAG, | |||
| bool | isThumb | |||
| ) | [static] |
Returns appropriate ARM CMP (cmp) and corresponding condition code for the given operands.
Definition at line 1056 of file ARMISelLowering.cpp.
References llvm::CallingConv::C, llvm::ARMISD::CMP, llvm::ARMISD::CMPNZ, llvm::ARMCC::EQ, llvm::MVT::Flag, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNode(), llvm::MVT::i32, IntCCToARMCC(), isLegalCmpImmediate(), llvm::ARMCC::MI, llvm::ARMCC::NE, llvm::ARMCC::PL, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, and llvm::ISD::SETULT.
Referenced by LowerBR_CC(), and LowerSELECT_CC().
| static bool getIndexedAddressParts | ( | SDNode * | Ptr, | |
| MVT | VT, | |||
| bool | isSEXTLoad, | |||
| SDValue & | Base, | |||
| SDValue & | Offset, | |||
| bool & | isInc, | |||
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 1668 of file ARMISelLowering.cpp.
References llvm::ISD::ADD, llvm::SelectionDAG::getConstant(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::ARM_AM::getShiftOpcForNode(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::ARM_AM::no_shift, RHS, and llvm::ISD::SUB.
Referenced by llvm::ARMTargetLowering::getPostIndexedAddressParts(), and llvm::ARMTargetLowering::getPreIndexedAddressParts().
| static SDValue getVFPCmp | ( | SDValue | LHS, | |
| SDValue | RHS, | |||
| SelectionDAG & | DAG | |||
| ) | [static] |
Returns a appropriate VFP CMP (fcmp{s|d}+fmstat) for the given operands.
Definition at line 1115 of file ARMISelLowering.cpp.
References llvm::ARMISD::CMPFP, llvm::ARMISD::CMPFPw0, llvm::MVT::Flag, llvm::ARMISD::FMSTAT, llvm::SelectionDAG::getNode(), and isFloatingPointZero().
Referenced by LowerBR_CC(), LowerFCOPYSIGN(), and LowerSELECT_CC().
| static bool GVIsIndirectSymbol | ( | GlobalValue * | GV, | |
| Reloc::Model | RelocM | |||
| ) | [static] |
GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol even in non-static mode.
Definition at line 834 of file ARMISelLowering.cpp.
References llvm::GlobalValue::hasCommonLinkage(), llvm::GlobalValue::hasHiddenVisibility(), llvm::GlobalValue::hasNotBeenReadFromBitcode(), llvm::GlobalValue::isDeclaration(), llvm::GlobalValue::mayBeOverridden(), and llvm::Reloc::Static.
| static void HowToPassArgument | ( | MVT | ObjectVT, | |
| unsigned | NumGPRs, | |||
| unsigned | StackOffset, | |||
| unsigned & | NeededGPRs, | |||
| unsigned & | NeededStackSize, | |||
| unsigned & | GPRPad, | |||
| unsigned & | StackPad, | |||
| ISD::ArgFlagsTy | Flags | |||
| ) | [static] |
Definition at line 362 of file ARMISelLowering.cpp.
References llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::ArgFlagsTy::getOrigAlign(), llvm::MVT::getSimpleVT(), llvm::MVT::i32, and llvm::MVT::i64.
Referenced by LowerFORMAL_ARGUMENT().
| static ARMCC::CondCodes IntCCToARMCC | ( | ISD::CondCode | CC | ) | [static] |
IntCCToARMCC - Convert a DAG integer condition code to an ARM CC.
Definition at line 312 of file ARMISelLowering.cpp.
References llvm::ARMCC::EQ, llvm::ARMCC::GE, llvm::ARMCC::GT, llvm::ARMCC::HI, llvm::ARMCC::HS, llvm::ARMCC::LE, llvm::ARMCC::LO, llvm::ARMCC::LS, llvm::ARMCC::LT, llvm::ARMCC::NE, llvm::ISD::SETEQ, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, and llvm::ISD::SETULT.
Referenced by getARMCmp().
| static bool isFloatingPointZero | ( | SDValue | Op | ) | [static] |
isFloatingPointZero - Return true if this is +0.0.
Definition at line 1034 of file ARMISelLowering.cpp.
References CP, llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::ISD::isEXTLoad(), llvm::ISD::isNON_EXTLoad(), and llvm::ARMISD::Wrapper.
Referenced by getVFPCmp().
| static bool isLegalAddressImmediate | ( | int64_t | V, | |
| MVT | VT, | |||
| const ARMSubtarget * | Subtarget | |||
| ) | [static] |
isLegalAddressImmediate - Return true if the integer value can be used as the offset of the target addressing mode for load / store of the given type.
Definition at line 1554 of file ARMISelLowering.cpp.
References llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::getSimpleVT(), llvm::ARMSubtarget::hasVFP2(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::ARMSubtarget::isThumb(), and Scale.
Referenced by llvm::ARMTargetLowering::isLegalAddressingMode().
| static bool isLegalCmpImmediate | ( | unsigned | C, | |
| bool | isThumb | |||
| ) | [static] |
Definition at line 1049 of file ARMISelLowering.cpp.
References llvm::ARM_AM::getSOImmVal().
Referenced by getARMCmp().
| static SDValue LowerBR_CC | ( | SDValue | Op, | |
| SelectionDAG & | DAG, | |||
| const ARMSubtarget * | ST | |||
| ) | [static] |
Definition at line 1158 of file ARMISelLowering.cpp.
References llvm::ARMCC::AL, llvm::ARMISD::BRCOND, Dest, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::Flag, FPCCToARMCC(), getARMCmp(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), getVFPCmp(), llvm::SelectionDAG::getVTList(), llvm::MVT::i32, llvm::ARMSubtarget::isThumb(), LHS, llvm::MVT::Other, RHS, and std::swap().
Referenced by llvm::SparcTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerConstantPool | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 707 of file ARMISelLowering.cpp.
References CP, llvm::ConstantPoolSDNode::getAlignment(), llvm::ConstantPoolSDNode::getConstVal(), llvm::ConstantPoolSDNode::getMachineCPVal(), llvm::SelectionDAG::getNode(), llvm::SelectionDAG::getTargetConstantPool(), llvm::SDValue::getValueType(), llvm::MVT::i32, llvm::ConstantPoolSDNode::isMachineConstantPoolEntry(), and llvm::ARMISD::Wrapper.
Referenced by llvm::SPU::LowerConstantPool(), llvm::SPUTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerFCOPYSIGN | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 1231 of file ARMISelLowering.cpp.
References llvm::ARMISD::CNEG, llvm::ISD::FABS, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getConstantFP(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValueType(), getVFPCmp(), llvm::MVT::i32, llvm::ARMCC::LT, and VT.
Referenced by llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerFORMAL_ARGUMENT | ( | SDValue | Op, | |
| SelectionDAG & | DAG, | |||
| unsigned | ArgNo, | |||
| unsigned & | NumGPRs, | |||
| unsigned & | ArgOffset | |||
| ) | [static] |
Definition at line 912 of file ARMISelLowering.cpp.
References llvm::MachineRegisterInfo::addLiveIn(), llvm::ISD::BIT_CONVERT, llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineRegisterInfo::createVirtualRegister(), llvm::MVT::f32, llvm::MVT::f64, FI, llvm::ARMISD::FMDRR, llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::MachineFunction::getRegInfo(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), HowToPassArgument(), llvm::MVT::i32, llvm::MVT::i64, MF, MFI, RegInfo, and Root.
| static SDValue LowerFP_TO_INT | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 1215 of file ARMISelLowering.cpp.
References llvm::ISD::BIT_CONVERT, llvm::MVT::f32, llvm::ISD::FP_TO_SINT, llvm::ARMISD::FTOSI, llvm::ARMISD::FTOUI, llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::MVT::i32.
Referenced by llvm::SPUTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerINT_TO_FP | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 1222 of file ARMISelLowering.cpp.
References llvm::ISD::BIT_CONVERT, llvm::MVT::f32, llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SDValue::getValueType(), llvm::ISD::SINT_TO_FP, llvm::ARMISD::SITOF, llvm::ARMISD::UITOF, and VT.
Referenced by llvm::SPUTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerINTRINSIC_WO_CHAIN | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 892 of file ARMISelLowering.cpp.
References llvm::Intrinsic::arm_thread_pointer, llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), and llvm::ARMISD::THREAD_POINTER.
Referenced by llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerRET | ( | SDValue | Op, | |
| SelectionDAG & | DAG | |||
| ) | [static] |
Definition at line 645 of file ARMISelLowering.cpp.
References llvm::MachineRegisterInfo::addLiveOut(), llvm::ISD::BIT_CONVERT, llvm::MVT::f32, llvm::MVT::f64, llvm::ARMISD::FMRRD, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getCopyToReg(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNumOperands(), llvm::SDValue::getOperand(), llvm::MachineFunction::getRegInfo(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValue(), llvm::SDValue::getValueType(), llvm::SelectionDAG::getVTList(), llvm::MVT::i32, llvm::MachineRegisterInfo::liveout_empty(), llvm::MVT::Other, llvm::ISD::RET, and llvm::ARMISD::RET_FLAG.
| static SDValue LowerSELECT_CC | ( | SDValue | Op, | |
| SelectionDAG & | DAG, | |||
| const ARMSubtarget * | ST | |||
| ) | [static] |
Definition at line 1124 of file ARMISelLowering.cpp.
References llvm::ARMCC::AL, llvm::ARMISD::CMOV, FPCCToARMCC(), getARMCmp(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getRegister(), llvm::SDValue::getValueType(), getVFPCmp(), llvm::MVT::i32, llvm::ARMSubtarget::isThumb(), LHS, RHS, std::swap(), and VT.
Referenced by llvm::SPUTargetLowering::LowerOperation(), llvm::SparcTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue LowerVASTART | ( | SDValue | Op, | |
| SelectionDAG & | DAG, | |||
| unsigned | VarArgsFrameIndex | |||
| ) | [static] |
Definition at line 902 of file ARMISelLowering.cpp.
References llvm::SelectionDAG::getFrameIndex(), llvm::SDValue::getOperand(), llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getStore(), and llvm::SelectionDAG::getTargetLoweringInfo().
Referenced by llvm::SparcTargetLowering::LowerOperation(), and llvm::ARMTargetLowering::LowerOperation().
| static SDValue PerformFMRRDCombine | ( | SDNode * | N, | |
| TargetLowering::DAGCombinerInfo & | DCI | |||
| ) | [static] |
PerformFMRRDCombine - Target-specific dag combine xforms for ARMISD::FMRRD.
Definition at line 1531 of file ARMISelLowering.cpp.
References llvm::TargetLowering::DAGCombinerInfo::CombineTo(), llvm::ARMISD::FMDRR, llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::SDNode::getOperand().
Referenced by llvm::ARMTargetLowering::PerformDAGCombine().