LLVM API Documentation

PIC16RegisterInfo.cpp

Go to the documentation of this file.
00001 //===- PIC16RegisterInfo.cpp - PIC16 Register Information -----------------===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source 
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the PIC16 implementation of the TargetRegisterInfo class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #define DEBUG_TYPE "pic16-reg-info"
00015 
00016 #include "PIC16.h"
00017 #include "PIC16RegisterInfo.h"
00018 #include "llvm/ADT/BitVector.h"
00019 
00020 
00021 using namespace llvm;
00022 
00023 PIC16RegisterInfo::PIC16RegisterInfo(const TargetInstrInfo &tii,
00024                                      const PIC16Subtarget &st)
00025   : PIC16GenRegisterInfo(PIC16::ADJCALLSTACKDOWN, PIC16::ADJCALLSTACKUP),
00026     TII(tii),
00027     ST(st) {}
00028 
00029 #include "PIC16GenRegisterInfo.inc"
00030 
00031 /// PIC16 Callee Saved Registers
00032 const unsigned* PIC16RegisterInfo::
00033 getCalleeSavedRegs(const MachineFunction *MF) const {
00034   static const unsigned CalleeSavedRegs[] = { 0 };
00035   return CalleeSavedRegs;
00036 }
00037 
00038 // PIC16 Callee Saved Reg Classes
00039 const TargetRegisterClass* const*
00040 PIC16RegisterInfo::getCalleeSavedRegClasses(const MachineFunction *MF) const {
00041   static const TargetRegisterClass * const CalleeSavedRegClasses[] = { 0 };
00042   return CalleeSavedRegClasses;
00043 }
00044 
00045 BitVector PIC16RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
00046   BitVector Reserved(getNumRegs());
00047   return Reserved;
00048 }
00049 
00050 bool PIC16RegisterInfo::hasFP(const MachineFunction &MF) const {
00051   return false;
00052 }
00053 
00054 void PIC16RegisterInfo::
00055 eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
00056                     RegScavenger *RS) const
00057 {    /* NOT YET IMPLEMENTED */  }
00058 
00059 void PIC16RegisterInfo::emitPrologue(MachineFunction &MF) const
00060 {    /* NOT YET IMPLEMENTED */  }
00061 
00062 void PIC16RegisterInfo::
00063 emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const
00064 {    /* NOT YET IMPLEMENTED */  }
00065 
00066 int PIC16RegisterInfo::
00067 getDwarfRegNum(unsigned RegNum, bool isEH) const {
00068   assert(0 && "Not keeping track of debug information yet!!");
00069   return -1;
00070 }
00071 
00072 unsigned PIC16RegisterInfo::getFrameRegister(MachineFunction &MF) const {
00073   assert(0 && "PIC16 Does not have any frame register");
00074   return 0;
00075 }
00076 
00077 unsigned PIC16RegisterInfo::getRARegister() const {
00078   assert(0 && "PIC16 Does not have any return address register");
00079   return 0;
00080 }
00081 
00082 // This function eliminates ADJCALLSTACKDOWN,
00083 // ADJCALLSTACKUP pseudo instructions
00084 void PIC16RegisterInfo::
00085 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
00086                               MachineBasicBlock::iterator I) const {
00087   // Simply discard ADJCALLSTACKDOWN,
00088   // ADJCALLSTACKUP instructions.
00089   MBB.erase(I);
00090 }
00091