LLVM API Documentation
00001 //===- TableGen'erated file -------------------------------------*- C++ -*-===// 00002 // 00003 // Register Information Source Fragment 00004 // 00005 // Automatically generated file, do not edit! 00006 // 00007 //===----------------------------------------------------------------------===// 00008 00009 namespace llvm { 00010 00011 namespace { // Register classes... 00012 // CRBITRC Register Class... 00013 static const unsigned CRBITRC[] = { 00014 PPC::CR0LT, PPC::CR0GT, PPC::CR0EQ, PPC::CR0UN, PPC::CR1LT, PPC::CR1GT, PPC::CR1EQ, PPC::CR1UN, PPC::CR2LT, PPC::CR2GT, PPC::CR2EQ, PPC::CR2UN, PPC::CR3LT, PPC::CR3GT, PPC::CR3EQ, PPC::CR3UN, PPC::CR4LT, PPC::CR4GT, PPC::CR4EQ, PPC::CR4UN, PPC::CR5LT, PPC::CR5GT, PPC::CR5EQ, PPC::CR5UN, PPC::CR6LT, PPC::CR6GT, PPC::CR6EQ, PPC::CR6UN, PPC::CR7LT, PPC::CR7GT, PPC::CR7EQ, PPC::CR7UN, 00015 }; 00016 00017 // CRRC Register Class... 00018 static const unsigned CRRC[] = { 00019 PPC::CR0, PPC::CR1, PPC::CR5, PPC::CR6, PPC::CR7, PPC::CR2, PPC::CR3, PPC::CR4, 00020 }; 00021 00022 // CTRRC Register Class... 00023 static const unsigned CTRRC[] = { 00024 PPC::CTR, 00025 }; 00026 00027 // CTRRC8 Register Class... 00028 static const unsigned CTRRC8[] = { 00029 PPC::CTR8, 00030 }; 00031 00032 // F4RC Register Class... 00033 static const unsigned F4RC[] = { 00034 PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 00035 }; 00036 00037 // F8RC Register Class... 00038 static const unsigned F8RC[] = { 00039 PPC::F0, PPC::F1, PPC::F2, PPC::F3, PPC::F4, PPC::F5, PPC::F6, PPC::F7, PPC::F8, PPC::F9, PPC::F10, PPC::F11, PPC::F12, PPC::F13, PPC::F14, PPC::F15, PPC::F16, PPC::F17, PPC::F18, PPC::F19, PPC::F20, PPC::F21, PPC::F22, PPC::F23, PPC::F24, PPC::F25, PPC::F26, PPC::F27, PPC::F28, PPC::F29, PPC::F30, PPC::F31, 00040 }; 00041 00042 // G8RC Register Class... 00043 static const unsigned G8RC[] = { 00044 PPC::X2, PPC::X3, PPC::X4, PPC::X5, PPC::X6, PPC::X7, PPC::X8, PPC::X9, PPC::X10, PPC::X11, PPC::X12, PPC::X30, PPC::X29, PPC::X28, PPC::X27, PPC::X26, PPC::X25, PPC::X24, PPC::X23, PPC::X22, PPC::X21, PPC::X20, PPC::X19, PPC::X18, PPC::X17, PPC::X16, PPC::X15, PPC::X14, PPC::X31, PPC::X13, PPC::X0, PPC::X1, PPC::LR8, 00045 }; 00046 00047 // GPRC Register Class... 00048 static const unsigned GPRC[] = { 00049 PPC::R2, PPC::R3, PPC::R4, PPC::R5, PPC::R6, PPC::R7, PPC::R8, PPC::R9, PPC::R10, PPC::R11, PPC::R12, PPC::R30, PPC::R29, PPC::R28, PPC::R27, PPC::R26, PPC::R25, PPC::R24, PPC::R23, PPC::R22, PPC::R21, PPC::R20, PPC::R19, PPC::R18, PPC::R17, PPC::R16, PPC::R15, PPC::R14, PPC::R13, PPC::R31, PPC::R0, PPC::R1, PPC::LR, 00050 }; 00051 00052 // VRRC Register Class... 00053 static const unsigned VRRC[] = { 00054 PPC::V2, PPC::V3, PPC::V4, PPC::V5, PPC::V0, PPC::V1, PPC::V6, PPC::V7, PPC::V8, PPC::V9, PPC::V10, PPC::V11, PPC::V12, PPC::V13, PPC::V14, PPC::V15, PPC::V16, PPC::V17, PPC::V18, PPC::V19, PPC::V20, PPC::V21, PPC::V22, PPC::V23, PPC::V24, PPC::V25, PPC::V26, PPC::V27, PPC::V28, PPC::V29, PPC::V30, PPC::V31, 00055 }; 00056 00057 // CRBITRCVTs Register Class Value Types... 00058 static const MVT CRBITRCVTs[] = { 00059 MVT::i32, MVT::Other 00060 }; 00061 00062 // CRRCVTs Register Class Value Types... 00063 static const MVT CRRCVTs[] = { 00064 MVT::i32, MVT::Other 00065 }; 00066 00067 // CTRRCVTs Register Class Value Types... 00068 static const MVT CTRRCVTs[] = { 00069 MVT::i32, MVT::Other 00070 }; 00071 00072 // CTRRC8VTs Register Class Value Types... 00073 static const MVT CTRRC8VTs[] = { 00074 MVT::i64, MVT::Other 00075 }; 00076 00077 // F4RCVTs Register Class Value Types... 00078 static const MVT F4RCVTs[] = { 00079 MVT::f32, MVT::Other 00080 }; 00081 00082 // F8RCVTs Register Class Value Types... 00083 static const MVT F8RCVTs[] = { 00084 MVT::f64, MVT::Other 00085 }; 00086 00087 // G8RCVTs Register Class Value Types... 00088 static const MVT G8RCVTs[] = { 00089 MVT::i64, MVT::Other 00090 }; 00091 00092 // GPRCVTs Register Class Value Types... 00093 static const MVT GPRCVTs[] = { 00094 MVT::i32, MVT::Other 00095 }; 00096 00097 // VRRCVTs Register Class Value Types... 00098 static const MVT VRRCVTs[] = { 00099 MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v4f32, MVT::Other 00100 }; 00101 00102 } // end anonymous namespace 00103 00104 namespace PPC { // Register class instances 00105 CRBITRCClass CRBITRCRegClass; 00106 CRRCClass CRRCRegClass; 00107 CTRRCClass CTRRCRegClass; 00108 CTRRC8Class CTRRC8RegClass; 00109 F4RCClass F4RCRegClass; 00110 F8RCClass F8RCRegClass; 00111 G8RCClass G8RCRegClass; 00112 GPRCClass GPRCRegClass; 00113 VRRCClass VRRCRegClass; 00114 00115 // CRBITRC Register Class sub-classes... 00116 static const TargetRegisterClass* const CRBITRCSubclasses [] = { 00117 NULL 00118 }; 00119 00120 // CRRC Register Class sub-classes... 00121 static const TargetRegisterClass* const CRRCSubclasses [] = { 00122 NULL 00123 }; 00124 00125 // CTRRC Register Class sub-classes... 00126 static const TargetRegisterClass* const CTRRCSubclasses [] = { 00127 NULL 00128 }; 00129 00130 // CTRRC8 Register Class sub-classes... 00131 static const TargetRegisterClass* const CTRRC8Subclasses [] = { 00132 NULL 00133 }; 00134 00135 // F4RC Register Class sub-classes... 00136 static const TargetRegisterClass* const F4RCSubclasses [] = { 00137 NULL 00138 }; 00139 00140 // F8RC Register Class sub-classes... 00141 static const TargetRegisterClass* const F8RCSubclasses [] = { 00142 NULL 00143 }; 00144 00145 // G8RC Register Class sub-classes... 00146 static const TargetRegisterClass* const G8RCSubclasses [] = { 00147 NULL 00148 }; 00149 00150 // GPRC Register Class sub-classes... 00151 static const TargetRegisterClass* const GPRCSubclasses [] = { 00152 NULL 00153 }; 00154 00155 // VRRC Register Class sub-classes... 00156 static const TargetRegisterClass* const VRRCSubclasses [] = { 00157 NULL 00158 }; 00159 00160 // CRBITRC Register Class super-classes... 00161 static const TargetRegisterClass* const CRBITRCSuperclasses [] = { 00162 NULL 00163 }; 00164 00165 // CRRC Register Class super-classes... 00166 static const TargetRegisterClass* const CRRCSuperclasses [] = { 00167 NULL 00168 }; 00169 00170 // CTRRC Register Class super-classes... 00171 static const TargetRegisterClass* const CTRRCSuperclasses [] = { 00172 NULL 00173 }; 00174 00175 // CTRRC8 Register Class super-classes... 00176 static const TargetRegisterClass* const CTRRC8Superclasses [] = { 00177 NULL 00178 }; 00179 00180 // F4RC Register Class super-classes... 00181 static const TargetRegisterClass* const F4RCSuperclasses [] = { 00182 NULL 00183 }; 00184 00185 // F8RC Register Class super-classes... 00186 static const TargetRegisterClass* const F8RCSuperclasses [] = { 00187 NULL 00188 }; 00189 00190 // G8RC Register Class super-classes... 00191 static const TargetRegisterClass* const G8RCSuperclasses [] = { 00192 NULL 00193 }; 00194 00195 // GPRC Register Class super-classes... 00196 static const TargetRegisterClass* const GPRCSuperclasses [] = { 00197 NULL 00198 }; 00199 00200 // VRRC Register Class super-classes... 00201 static const TargetRegisterClass* const VRRCSuperclasses [] = { 00202 NULL 00203 }; 00204 00205 00206 CRBITRCClass::CRBITRCClass() : TargetRegisterClass(CRBITRCRegClassID, CRBITRCVTs, CRBITRCSubclasses, CRBITRCSuperclasses, 4, 4, -1, CRBITRC, CRBITRC + 32) {} 00207 00208 CRRCClass::CRRCClass() : TargetRegisterClass(CRRCRegClassID, CRRCVTs, CRRCSubclasses, CRRCSuperclasses, 4, 4, 1, CRRC, CRRC + 8) {} 00209 00210 CTRRCClass::CTRRCClass() : TargetRegisterClass(CTRRCRegClassID, CTRRCVTs, CTRRCSubclasses, CTRRCSuperclasses, 4, 4, 1, CTRRC, CTRRC + 1) {} 00211 00212 CTRRC8Class::CTRRC8Class() : TargetRegisterClass(CTRRC8RegClassID, CTRRC8VTs, CTRRC8Subclasses, CTRRC8Superclasses, 8, 8, 1, CTRRC8, CTRRC8 + 1) {} 00213 00214 F4RCClass::F4RCClass() : TargetRegisterClass(F4RCRegClassID, F4RCVTs, F4RCSubclasses, F4RCSuperclasses, 4, 4, 1, F4RC, F4RC + 32) {} 00215 00216 F8RCClass::F8RCClass() : TargetRegisterClass(F8RCRegClassID, F8RCVTs, F8RCSubclasses, F8RCSuperclasses, 8, 8, 1, F8RC, F8RC + 32) {} 00217 00218 G8RCClass::iterator 00219 G8RCClass::allocation_order_begin(const MachineFunction &MF) const { 00220 return begin(); 00221 } 00222 G8RCClass::iterator 00223 G8RCClass::allocation_order_end(const MachineFunction &MF) const { 00224 if (needsFP(MF)) 00225 return end()-5; 00226 else 00227 return end()-4; 00228 } 00229 00230 G8RCClass::G8RCClass() : TargetRegisterClass(G8RCRegClassID, G8RCVTs, G8RCSubclasses, G8RCSuperclasses, 8, 8, 1, G8RC, G8RC + 33) {} 00231 00232 GPRCClass::iterator 00233 GPRCClass::allocation_order_begin(const MachineFunction &MF) const { 00234 // In Linux, r2 is reserved for the OS. 00235 if (!MF.getTarget().getSubtarget<PPCSubtarget>().isDarwin()) 00236 return begin()+1; 00237 00238 return begin(); 00239 } 00240 GPRCClass::iterator 00241 GPRCClass::allocation_order_end(const MachineFunction &MF) const { 00242 // On PPC64, r13 is the thread pointer. Never allocate this register. 00243 // Note that this is overconservative, as it also prevents allocation of 00244 // R31 when the FP is not needed. 00245 if (MF.getTarget().getSubtarget<PPCSubtarget>().isPPC64()) 00246 return end()-5; // don't allocate R13, R31, R0, R1, LR 00247 00248 if (needsFP(MF)) 00249 return end()-4; // don't allocate R31, R0, R1, LR 00250 else 00251 return end()-3; // don't allocate R0, R1, LR 00252 } 00253 00254 GPRCClass::GPRCClass() : TargetRegisterClass(GPRCRegClassID, GPRCVTs, GPRCSubclasses, GPRCSuperclasses, 4, 4, 1, GPRC, GPRC + 33) {} 00255 00256 VRRCClass::VRRCClass() : TargetRegisterClass(VRRCRegClassID, VRRCVTs, VRRCSubclasses, VRRCSuperclasses, 16, 16, 1, VRRC, VRRC + 32) {} 00257 } 00258 00259 namespace { 00260 const TargetRegisterClass* const RegisterClasses[] = { 00261 &PPC::CRBITRCRegClass, 00262 &PPC::CRRCRegClass, 00263 &PPC::CTRRCRegClass, 00264 &PPC::CTRRC8RegClass, 00265 &PPC::F4RCRegClass, 00266 &PPC::F8RCRegClass, 00267 &PPC::G8RCRegClass, 00268 &PPC::GPRCRegClass, 00269 &PPC::VRRCRegClass, 00270 }; 00271 00272 00273 // Number of hash collisions: 0 00274 const unsigned SubregHashTable[] = { PPC::NoRegister, PPC::NoRegister, 00275 PPC::NoRegister, PPC::NoRegister, 00276 PPC::NoRegister, PPC::NoRegister, 00277 PPC::NoRegister, PPC::NoRegister, 00278 PPC::NoRegister, PPC::NoRegister, 00279 PPC::NoRegister, PPC::NoRegister, 00280 PPC::X17, PPC::R17, 00281 PPC::NoRegister, PPC::NoRegister, 00282 PPC::NoRegister, PPC::NoRegister, 00283 PPC::NoRegister, PPC::NoRegister, 00284 PPC::NoRegister, PPC::NoRegister, 00285 PPC::NoRegister, PPC::NoRegister, 00286 PPC::NoRegister, PPC::NoRegister, 00287 PPC::NoRegister, PPC::NoRegister, 00288 PPC::NoRegister, PPC::NoRegister, 00289 PPC::NoRegister, PPC::NoRegister, 00290 PPC::X23, PPC::R23, 00291 PPC::NoRegister, PPC::NoRegister, 00292 PPC::NoRegister, PPC::NoRegister, 00293 PPC::NoRegister, PPC::NoRegister, 00294 PPC::NoRegister, PPC::NoRegister, 00295 PPC::NoRegister, PPC::NoRegister, 00296 PPC::NoRegister, PPC::NoRegister, 00297 PPC::NoRegister, PPC::NoRegister, 00298 PPC::NoRegister, PPC::NoRegister, 00299 PPC::NoRegister, PPC::NoRegister, 00300 PPC::X3, PPC::R3, 00301 PPC::NoRegister, PPC::NoRegister, 00302 PPC::NoRegister, PPC::NoRegister, 00303 PPC::NoRegister, PPC::NoRegister, 00304 PPC::NoRegister, PPC::NoRegister, 00305 PPC::NoRegister, PPC::NoRegister, 00306 PPC::NoRegister, PPC::NoRegister, 00307 PPC::NoRegister, PPC::NoRegister, 00308 PPC::X11, PPC::R11, 00309 PPC::NoRegister, PPC::NoRegister, 00310 PPC::X8, PPC::R8, 00311 PPC::NoRegister, PPC::NoRegister, 00312 PPC::NoRegister, PPC::NoRegister, 00313 PPC::NoRegister, PPC::NoRegister, 00314 PPC::NoRegister, PPC::NoRegister, 00315 PPC::NoRegister, PPC::NoRegister, 00316 PPC::NoRegister, PPC::NoRegister, 00317 PPC::NoRegister, PPC::NoRegister, 00318 PPC::X18, PPC::R18, 00319 PPC::NoRegister, PPC::NoRegister, 00320 PPC::NoRegister, PPC::NoRegister, 00321 PPC::NoRegister, PPC::NoRegister, 00322 PPC::NoRegister, PPC::NoRegister, 00323 PPC::NoRegister, PPC::NoRegister, 00324 PPC::NoRegister, PPC::NoRegister, 00325 PPC::NoRegister, PPC::NoRegister, 00326 PPC::NoRegister, PPC::NoRegister, 00327 PPC::NoRegister, PPC::NoRegister, 00328 PPC::X24, PPC::R24, 00329 PPC::NoRegister, PPC::NoRegister, 00330 PPC::NoRegister, PPC::NoRegister, 00331 PPC::NoRegister, PPC::NoRegister, 00332 PPC::NoRegister, PPC::NoRegister, 00333 PPC::NoRegister, PPC::NoRegister, 00334 PPC::NoRegister, PPC::NoRegister, 00335 PPC::NoRegister, PPC::NoRegister, 00336 PPC::NoRegister, PPC::NoRegister, 00337 PPC::NoRegister, PPC::NoRegister, 00338 PPC::X30, PPC::R30, 00339 PPC::NoRegister, PPC::NoRegister, 00340 PPC::NoRegister, PPC::NoRegister, 00341 PPC::NoRegister, PPC::NoRegister, 00342 PPC::NoRegister, PPC::NoRegister, 00343 PPC::NoRegister, PPC::NoRegister, 00344 PPC::NoRegister, PPC::NoRegister, 00345 PPC::NoRegister, PPC::NoRegister, 00346 PPC::X12, PPC::R12, 00347 PPC::NoRegister, PPC::NoRegister, 00348 PPC::X9, PPC::R9, 00349 PPC::NoRegister, PPC::NoRegister, 00350 PPC::NoRegister, PPC::NoRegister, 00351 PPC::NoRegister, PPC::NoRegister, 00352 PPC::NoRegister, PPC::NoRegister, 00353 PPC::NoRegister, PPC::NoRegister, 00354 PPC::NoRegister, PPC::NoRegister, 00355 PPC::NoRegister, PPC::NoRegister, 00356 PPC::X19, PPC::R19, 00357 PPC::NoRegister, PPC::NoRegister, 00358 PPC::NoRegister, PPC::NoRegister, 00359 PPC::NoRegister, PPC::NoRegister, 00360 PPC::NoRegister, PPC::NoRegister, 00361 PPC::NoRegister, PPC::NoRegister, 00362 PPC::NoRegister, PPC::NoRegister, 00363 PPC::NoRegister, PPC::NoRegister, 00364 PPC::NoRegister, PPC::NoRegister, 00365 PPC::NoRegister, PPC::NoRegister, 00366 PPC::X25, PPC::R25, 00367 PPC::NoRegister, PPC::NoRegister, 00368 PPC::NoRegister, PPC::NoRegister, 00369 PPC::NoRegister, PPC::NoRegister, 00370 PPC::NoRegister, PPC::NoRegister, 00371 PPC::NoRegister, PPC::NoRegister, 00372 PPC::NoRegister, PPC::NoRegister, 00373 PPC::NoRegister, PPC::NoRegister, 00374 PPC::NoRegister, PPC::NoRegister, 00375 PPC::NoRegister, PPC::NoRegister, 00376 PPC::X31, PPC::R31, 00377 PPC::NoRegister, PPC::NoRegister, 00378 PPC::NoRegister, PPC::NoRegister, 00379 PPC::NoRegister, PPC::NoRegister, 00380 PPC::NoRegister, PPC::NoRegister, 00381 PPC::NoRegister, PPC::NoRegister, 00382 PPC::NoRegister, PPC::NoRegister, 00383 PPC::NoRegister, PPC::NoRegister, 00384 PPC::X13, PPC::R13, 00385 PPC::NoRegister, PPC::NoRegister, 00386 PPC::NoRegister, PPC::NoRegister, 00387 PPC::NoRegister, PPC::NoRegister, 00388 PPC::NoRegister, PPC::NoRegister, 00389 PPC::NoRegister, PPC::NoRegister, 00390 PPC::NoRegister, PPC::NoRegister, 00391 PPC::NoRegister, PPC::NoRegister, 00392 PPC::NoRegister, PPC::NoRegister, 00393 PPC::NoRegister, PPC::NoRegister, 00394 PPC::X2, PPC::R2, 00395 PPC::NoRegister, PPC::NoRegister, 00396 PPC::NoRegister, PPC::NoRegister, 00397 PPC::NoRegister, PPC::NoRegister, 00398 PPC::NoRegister, PPC::NoRegister, 00399 PPC::NoRegister, PPC::NoRegister, 00400 PPC::NoRegister, PPC::NoRegister, 00401 PPC::NoRegister, PPC::NoRegister, 00402 PPC::NoRegister, PPC::NoRegister, 00403 PPC::NoRegister, PPC::NoRegister, 00404 PPC::X26, PPC::R26, 00405 PPC::NoRegister, PPC::NoRegister, 00406 PPC::NoRegister, PPC::NoRegister, 00407 PPC::NoRegister, PPC::NoRegister, 00408 PPC::NoRegister, PPC::NoRegister, 00409 PPC::NoRegister, PPC::NoRegister, 00410 PPC::NoRegister, PPC::NoRegister, 00411 PPC::NoRegister, PPC::NoRegister, 00412 PPC::NoRegister, PPC::NoRegister, 00413 PPC::NoRegister, PPC::NoRegister, 00414 PPC::X4, PPC::R4, 00415 PPC::NoRegister, PPC::NoRegister, 00416 PPC::NoRegister, PPC::NoRegister, 00417 PPC::NoRegister, PPC::NoRegister, 00418 PPC::NoRegister, PPC::NoRegister, 00419 PPC::NoRegister, PPC::NoRegister, 00420 PPC::NoRegister, PPC::NoRegister, 00421 PPC::NoRegister, PPC::NoRegister, 00422 PPC::X14, PPC::R14, 00423 PPC::NoRegister, PPC::NoRegister, 00424 PPC::NoRegister, PPC::NoRegister, 00425 PPC::NoRegister, PPC::NoRegister, 00426 PPC::NoRegister, PPC::NoRegister, 00427 PPC::NoRegister, PPC::NoRegister, 00428 PPC::NoRegister, PPC::NoRegister, 00429 PPC::NoRegister, PPC::NoRegister, 00430 PPC::NoRegister, PPC::NoRegister, 00431 PPC::NoRegister, PPC::NoRegister, 00432 PPC::X20, PPC::R20, 00433 PPC::NoRegister, PPC::NoRegister, 00434 PPC::NoRegister, PPC::NoRegister, 00435 PPC::NoRegister, PPC::NoRegister, 00436 PPC::NoRegister, PPC::NoRegister, 00437 PPC::NoRegister, PPC::NoRegister, 00438 PPC::NoRegister, PPC::NoRegister, 00439 PPC::NoRegister, PPC::NoRegister, 00440 PPC::NoRegister, PPC::NoRegister, 00441 PPC::NoRegister, PPC::NoRegister, 00442 PPC::X27, PPC::R27, 00443 PPC::NoRegister, PPC::NoRegister, 00444 PPC::NoRegister, PPC::NoRegister, 00445 PPC::NoRegister, PPC::NoRegister, 00446 PPC::NoRegister, PPC::NoRegister, 00447 PPC::NoRegister, PPC::NoRegister, 00448 PPC::NoRegister, PPC::NoRegister, 00449 PPC::NoRegister, PPC::NoRegister, 00450 PPC::X0, PPC::R0, 00451 PPC::NoRegister, PPC::NoRegister, 00452 PPC::X5, PPC::R5, 00453 PPC::NoRegister, PPC::NoRegister, 00454 PPC::NoRegister, PPC::NoRegister, 00455 PPC::NoRegister, PPC::NoRegister, 00456 PPC::NoRegister, PPC::NoRegister, 00457 PPC::NoRegister, PPC::NoRegister, 00458 PPC::NoRegister, PPC::NoRegister, 00459 PPC::NoRegister, PPC::NoRegister, 00460 PPC::X15, PPC::R15, 00461 PPC::NoRegister, PPC::NoRegister, 00462 PPC::NoRegister, PPC::NoRegister, 00463 PPC::NoRegister, PPC::NoRegister, 00464 PPC::NoRegister, PPC::NoRegister, 00465 PPC::NoRegister, PPC::NoRegister, 00466 PPC::NoRegister, PPC::NoRegister, 00467 PPC::NoRegister, PPC::NoRegister, 00468 PPC::NoRegister, PPC::NoRegister, 00469 PPC::NoRegister, PPC::NoRegister, 00470 PPC::X21, PPC::R21, 00471 PPC::NoRegister, PPC::NoRegister, 00472 PPC::NoRegister, PPC::NoRegister, 00473 PPC::NoRegister, PPC::NoRegister, 00474 PPC::NoRegister, PPC::NoRegister, 00475 PPC::NoRegister, PPC::NoRegister, 00476 PPC::NoRegister, PPC::NoRegister, 00477 PPC::NoRegister, PPC::NoRegister, 00478 PPC::NoRegister, PPC::NoRegister, 00479 PPC::NoRegister, PPC::NoRegister, 00480 PPC::X28, PPC::R28, 00481 PPC::NoRegister, PPC::NoRegister, 00482 PPC::NoRegister, PPC::NoRegister, 00483 PPC::NoRegister, PPC::NoRegister, 00484 PPC::NoRegister, PPC::NoRegister, 00485 PPC::NoRegister, PPC::NoRegister, 00486 PPC::NoRegister, PPC::NoRegister, 00487 PPC::NoRegister, PPC::NoRegister, 00488 PPC::X1, PPC::R1, 00489 PPC::NoRegister, PPC::NoRegister, 00490 PPC::X6, PPC::R6, 00491 PPC::NoRegister, PPC::NoRegister, 00492 PPC::NoRegister, PPC::NoRegister, 00493 PPC::NoRegister, PPC::NoRegister, 00494 PPC::NoRegister, PPC::NoRegister, 00495 PPC::NoRegister, PPC::NoRegister, 00496 PPC::NoRegister, PPC::NoRegister, 00497 PPC::NoRegister, PPC::NoRegister, 00498 PPC::X16, PPC::R16, 00499 PPC::NoRegister, PPC::NoRegister, 00500 PPC::NoRegister, PPC::NoRegister, 00501 PPC::NoRegister, PPC::NoRegister, 00502 PPC::NoRegister, PPC::NoRegister, 00503 PPC::NoRegister, PPC::NoRegister, 00504 PPC::NoRegister, PPC::NoRegister, 00505 PPC::NoRegister, PPC::NoRegister, 00506 PPC::NoRegister, PPC::NoRegister, 00507 PPC::NoRegister, PPC::NoRegister, 00508 PPC::X22, PPC::R22, 00509 PPC::NoRegister, PPC::NoRegister, 00510 PPC::NoRegister, PPC::NoRegister, 00511 PPC::NoRegister, PPC::NoRegister, 00512 PPC::NoRegister, PPC::NoRegister, 00513 PPC::NoRegister, PPC::NoRegister, 00514 PPC::NoRegister, PPC::NoRegister, 00515 PPC::NoRegister, PPC::NoRegister, 00516 PPC::NoRegister, PPC::NoRegister, 00517 PPC::NoRegister, PPC::NoRegister, 00518 PPC::X29, PPC::R29, 00519 PPC::NoRegister, PPC::NoRegister, 00520 PPC::NoRegister, PPC::NoRegister, 00521 PPC::NoRegister, PPC::NoRegister, 00522 PPC::NoRegister, PPC::NoRegister, 00523 PPC::NoRegister, PPC::NoRegister, 00524 PPC::NoRegister, PPC::NoRegister, 00525 PPC::NoRegister, PPC::NoRegister, 00526 PPC::X10, PPC::R10, 00527 PPC::NoRegister, PPC::NoRegister, 00528 PPC::X7, PPC::R7, 00529 PPC::NoRegister, PPC::NoRegister }; 00530 const unsigned SubregHashTableSize = 256; 00531 00532 00533 // Register Alias Sets... 00534 const unsigned Empty_AliasSet[] = { 0 }; 00535 const unsigned R0_AliasSet[] = { PPC::X0, 0 }; 00536 const unsigned R1_AliasSet[] = { PPC::X1, 0 }; 00537 const unsigned R10_AliasSet[] = { PPC::X10, 0 }; 00538 const unsigned R11_AliasSet[] = { PPC::X11, 0 }; 00539 const unsigned R12_AliasSet[] = { PPC::X12, 0 }; 00540 const unsigned R13_AliasSet[] = { PPC::X13, 0 }; 00541 const unsigned R14_AliasSet[] = { PPC::X14, 0 }; 00542 const unsigned R15_AliasSet[] = { PPC::X15, 0 }; 00543 const unsigned R16_AliasSet[] = { PPC::X16, 0 }; 00544 const unsigned R17_AliasSet[] = { PPC::X17, 0 }; 00545 const unsigned R18_AliasSet[] = { PPC::X18, 0 }; 00546 const unsigned R19_AliasSet[] = { PPC::X19, 0 }; 00547 const unsigned R2_AliasSet[] = { PPC::X2, 0 }; 00548 const unsigned R20_AliasSet[] = { PPC::X20, 0 }; 00549 const unsigned R21_AliasSet[] = { PPC::X21, 0 }; 00550 const unsigned R22_AliasSet[] = { PPC::X22, 0 }; 00551 const unsigned R23_AliasSet[] = { PPC::X23, 0 }; 00552 const unsigned R24_AliasSet[] = { PPC::X24, 0 }; 00553 const unsigned R25_AliasSet[] = { PPC::X25, 0 }; 00554 const unsigned R26_AliasSet[] = { PPC::X26, 0 }; 00555 const unsigned R27_AliasSet[] = { PPC::X27, 0 }; 00556 const unsigned R28_AliasSet[] = { PPC::X28, 0 }; 00557 const unsigned R29_AliasSet[] = { PPC::X29, 0 }; 00558 const unsigned R3_AliasSet[] = { PPC::X3, 0 }; 00559 const unsigned R30_AliasSet[] = { PPC::X30, 0 }; 00560 const unsigned R31_AliasSet[] = { PPC::X31, 0 }; 00561 const unsigned R4_AliasSet[] = { PPC::X4, 0 }; 00562 const unsigned R5_AliasSet[] = { PPC::X5, 0 }; 00563 const unsigned R6_AliasSet[] = { PPC::X6, 0 }; 00564 const unsigned R7_AliasSet[] = { PPC::X7, 0 }; 00565 const unsigned R8_AliasSet[] = { PPC::X8, 0 }; 00566 const unsigned R9_AliasSet[] = { PPC::X9, 0 }; 00567 const unsigned X0_AliasSet[] = { PPC::R0, 0 }; 00568 const unsigned X1_AliasSet[] = { PPC::R1, 0 }; 00569 const unsigned X10_AliasSet[] = { PPC::R10, 0 }; 00570 const unsigned X11_AliasSet[] = { PPC::R11, 0 }; 00571 const unsigned X12_AliasSet[] = { PPC::R12, 0 }; 00572 const unsigned X13_AliasSet[] = { PPC::R13, 0 }; 00573 const unsigned X14_AliasSet[] = { PPC::R14, 0 }; 00574 const unsigned X15_AliasSet[] = { PPC::R15, 0 }; 00575 const unsigned X16_AliasSet[] = { PPC::R16, 0 }; 00576 const unsigned X17_AliasSet[] = { PPC::R17, 0 }; 00577 const unsigned X18_AliasSet[] = { PPC::R18, 0 }; 00578 const unsigned X19_AliasSet[] = { PPC::R19, 0 }; 00579 const unsigned X2_AliasSet[] = { PPC::R2, 0 }; 00580 const unsigned X20_AliasSet[] = { PPC::R20, 0 }; 00581 const unsigned X21_AliasSet[] = { PPC::R21, 0 }; 00582 const unsigned X22_AliasSet[] = { PPC::R22, 0 }; 00583 const unsigned X23_AliasSet[] = { PPC::R23, 0 }; 00584 const unsigned X24_AliasSet[] = { PPC::R24, 0 }; 00585 const unsigned X25_AliasSet[] = { PPC::R25, 0 }; 00586 const unsigned X26_AliasSet[] = { PPC::R26, 0 }; 00587 const unsigned X27_AliasSet[] = { PPC::R27, 0 }; 00588 const unsigned X28_AliasSet[] = { PPC::R28, 0 }; 00589 const unsigned X29_AliasSet[] = { PPC::R29, 0 }; 00590 const unsigned X3_AliasSet[] = { PPC::R3, 0 }; 00591 const unsigned X30_AliasSet[] = { PPC::R30, 0 }; 00592 const unsigned X31_AliasSet[] = { PPC::R31, 0 }; 00593 const unsigned X4_AliasSet[] = { PPC::R4, 0 }; 00594 const unsigned X5_AliasSet[] = { PPC::R5, 0 }; 00595 const unsigned X6_AliasSet[] = { PPC::R6, 0 }; 00596 const unsigned X7_AliasSet[] = { PPC::R7, 0 }; 00597 const unsigned X8_AliasSet[] = { PPC::R8, 0 }; 00598 const unsigned X9_AliasSet[] = { PPC::R9, 0 }; 00599 00600 00601 // Register Sub-registers Sets... 00602 const unsigned Empty_SubRegsSet[] = { 0 }; 00603 const unsigned CR0_SubRegsSet[] = { 0 }; 00604 const unsigned CR0EQ_SubRegsSet[] = { 0 }; 00605 const unsigned CR0GT_SubRegsSet[] = { 0 }; 00606 const unsigned CR0LT_SubRegsSet[] = { 0 }; 00607 const unsigned CR0UN_SubRegsSet[] = { 0 }; 00608 const unsigned CR1_SubRegsSet[] = { 0 }; 00609 const unsigned CR1EQ_SubRegsSet[] = { 0 }; 00610 const unsigned CR1GT_SubRegsSet[] = { 0 }; 00611 const unsigned CR1LT_SubRegsSet[] = { 0 }; 00612 const unsigned CR1UN_SubRegsSet[] = { 0 }; 00613 const unsigned CR2_SubRegsSet[] = { 0 }; 00614 const unsigned CR2EQ_SubRegsSet[] = { 0 }; 00615 const unsigned CR2GT_SubRegsSet[] = { 0 }; 00616 const unsigned CR2LT_SubRegsSet[] = { 0 }; 00617 const unsigned CR2UN_SubRegsSet[] = { 0 }; 00618 const unsigned CR3_SubRegsSet[] = { 0 }; 00619 const unsigned CR3EQ_SubRegsSet[] = { 0 }; 00620 const unsigned CR3GT_SubRegsSet[] = { 0 }; 00621 const unsigned CR3LT_SubRegsSet[] = { 0 }; 00622 const unsigned CR3UN_SubRegsSet[] = { 0 }; 00623 const unsigned CR4_SubRegsSet[] = { 0 }; 00624 const unsigned CR4EQ_SubRegsSet[] = { 0 }; 00625 const unsigned CR4GT_SubRegsSet[] = { 0 }; 00626 const unsigned CR4LT_SubRegsSet[] = { 0 }; 00627 const unsigned CR4UN_SubRegsSet[] = { 0 }; 00628 const unsigned CR5_SubRegsSet[] = { 0 }; 00629 const unsigned CR5EQ_SubRegsSet[] = { 0 }; 00630 const unsigned CR5GT_SubRegsSet[] = { 0 }; 00631 const unsigned CR5LT_SubRegsSet[] = { 0 }; 00632 const unsigned CR5UN_SubRegsSet[] = { 0 }; 00633 const unsigned CR6_SubRegsSet[] = { 0 }; 00634 const unsigned CR6EQ_SubRegsSet[] = { 0 }; 00635 const unsigned CR6GT_SubRegsSet[] = { 0 }; 00636 const unsigned CR6LT_SubRegsSet[] = { 0 }; 00637 const unsigned CR6UN_SubRegsSet[] = { 0 }; 00638 const unsigned CR7_SubRegsSet[] = { 0 }; 00639 const unsigned CR7EQ_SubRegsSet[] = { 0 }; 00640 const unsigned CR7GT_SubRegsSet[] = { 0 }; 00641 const unsigned CR7LT_SubRegsSet[] = { 0 }; 00642 const unsigned CR7UN_SubRegsSet[] = { 0 }; 00643 const unsigned CTR_SubRegsSet[] = { 0 }; 00644 const unsigned CTR8_SubRegsSet[] = { 0 }; 00645 const unsigned F0_SubRegsSet[] = { 0 }; 00646 const unsigned F1_SubRegsSet[] = { 0 }; 00647 const unsigned F10_SubRegsSet[] = { 0 }; 00648 const unsigned F11_SubRegsSet[] = { 0 }; 00649 const unsigned F12_SubRegsSet[] = { 0 }; 00650 const unsigned F13_SubRegsSet[] = { 0 }; 00651 const unsigned F14_SubRegsSet[] = { 0 }; 00652 const unsigned F15_SubRegsSet[] = { 0 }; 00653 const unsigned F16_SubRegsSet[] = { 0 }; 00654 const unsigned F17_SubRegsSet[] = { 0 }; 00655 const unsigned F18_SubRegsSet[] = { 0 }; 00656 const unsigned F19_SubRegsSet[] = { 0 }; 00657 const unsigned F2_SubRegsSet[] = { 0 }; 00658 const unsigned F20_SubRegsSet[] = { 0 }; 00659 const unsigned F21_SubRegsSet[] = { 0 }; 00660 const unsigned F22_SubRegsSet[] = { 0 }; 00661 const unsigned F23_SubRegsSet[] = { 0 }; 00662 const unsigned F24_SubRegsSet[] = { 0 }; 00663 const unsigned F25_SubRegsSet[] = { 0 }; 00664 const unsigned F26_SubRegsSet[] = { 0 }; 00665 const unsigned F27_SubRegsSet[] = { 0 }; 00666 const unsigned F28_SubRegsSet[] = { 0 }; 00667 const unsigned F29_SubRegsSet[] = { 0 }; 00668 const unsigned F3_SubRegsSet[] = { 0 }; 00669 const unsigned F30_SubRegsSet[] = { 0 }; 00670 const unsigned F31_SubRegsSet[] = { 0 }; 00671 const unsigned F4_SubRegsSet[] = { 0 }; 00672 const unsigned F5_SubRegsSet[] = { 0 }; 00673 const unsigned F6_SubRegsSet[] = { 0 }; 00674 const unsigned F7_SubRegsSet[] = { 0 }; 00675 const unsigned F8_SubRegsSet[] = { 0 }; 00676 const unsigned F9_SubRegsSet[] = { 0 }; 00677 const unsigned LR_SubRegsSet[] = { 0 }; 00678 const unsigned LR8_SubRegsSet[] = { 0 }; 00679 const unsigned R0_SubRegsSet[] = { 0 }; 00680 const unsigned R1_SubRegsSet[] = { 0 }; 00681 const unsigned R10_SubRegsSet[] = { 0 }; 00682 const unsigned R11_SubRegsSet[] = { 0 }; 00683 const unsigned R12_SubRegsSet[] = { 0 }; 00684 const unsigned R13_SubRegsSet[] = { 0 }; 00685 const unsigned R14_SubRegsSet[] = { 0 }; 00686 const unsigned R15_SubRegsSet[] = { 0 }; 00687 const unsigned R16_SubRegsSet[] = { 0 }; 00688 const unsigned R17_SubRegsSet[] = { 0 }; 00689 const unsigned R18_SubRegsSet[] = { 0 }; 00690 const unsigned R19_SubRegsSet[] = { 0 }; 00691 const unsigned R2_SubRegsSet[] = { 0 }; 00692 const unsigned R20_SubRegsSet[] = { 0 }; 00693 const unsigned R21_SubRegsSet[] = { 0 }; 00694 const unsigned R22_SubRegsSet[] = { 0 }; 00695 const unsigned R23_SubRegsSet[] = { 0 }; 00696 const unsigned R24_SubRegsSet[] = { 0 }; 00697 const unsigned R25_SubRegsSet[] = { 0 }; 00698 const unsigned R26_SubRegsSet[] = { 0 }; 00699 const unsigned R27_SubRegsSet[] = { 0 }; 00700 const unsigned R28_SubRegsSet[] = { 0 }; 00701 const unsigned R29_SubRegsSet[] = { 0 }; 00702 const unsigned R3_SubRegsSet[] = { 0 }; 00703 const unsigned R30_SubRegsSet[] = { 0 }; 00704 const unsigned R31_SubRegsSet[] = { 0 }; 00705 const unsigned R4_SubRegsSet[] = { 0 }; 00706 const unsigned R5_SubRegsSet[] = { 0 }; 00707 const unsigned R6_SubRegsSet[] = { 0 }; 00708 const unsigned R7_SubRegsSet[] = { 0 }; 00709 const unsigned R8_SubRegsSet[] = { 0 }; 00710 const unsigned R9_SubRegsSet[] = { 0 }; 00711 const unsigned RM_SubRegsSet[] = { 0 }; 00712 const unsigned V0_SubRegsSet[] = { 0 }; 00713 const unsigned V1_SubRegsSet[] = { 0 }; 00714 const unsigned V10_SubRegsSet[] = { 0 }; 00715 const unsigned V11_SubRegsSet[] = { 0 }; 00716 const unsigned V12_SubRegsSet[] = { 0 }; 00717 const unsigned V13_SubRegsSet[] = { 0 }; 00718 const unsigned V14_SubRegsSet[] = { 0 }; 00719 const unsigned V15_SubRegsSet[] = { 0 }; 00720 const unsigned V16_SubRegsSet[] = { 0 }; 00721 const unsigned V17_SubRegsSet[] = { 0 }; 00722 const unsigned V18_SubRegsSet[] = { 0 }; 00723 const unsigned V19_SubRegsSet[] = { 0 }; 00724 const unsigned V2_SubRegsSet[] = { 0 }; 00725 const unsigned V20_SubRegsSet[] = { 0 }; 00726 const unsigned V21_SubRegsSet[] = { 0 }; 00727 const unsigned V22_SubRegsSet[] = { 0 }; 00728 const unsigned V23_SubRegsSet[] = { 0 }; 00729 const unsigned V24_SubRegsSet[] = { 0 }; 00730 const unsigned V25_SubRegsSet[] = { 0 }; 00731 const unsigned V26_SubRegsSet[] = { 0 }; 00732 const unsigned V27_SubRegsSet[] = { 0 }; 00733 const unsigned V28_SubRegsSet[] = { 0 }; 00734 const unsigned V29_SubRegsSet[] = { 0 }; 00735 const unsigned V3_SubRegsSet[] = { 0 }; 00736 const unsigned V30_SubRegsSet[] = { 0 }; 00737 const unsigned V31_SubRegsSet[] = { 0 }; 00738 const unsigned V4_SubRegsSet[] = { 0 }; 00739 const unsigned V5_SubRegsSet[] = { 0 }; 00740 const unsigned V6_SubRegsSet[] = { 0 }; 00741 const unsigned V7_SubRegsSet[] = { 0 }; 00742 const unsigned V8_SubRegsSet[] = { 0 }; 00743 const unsigned V9_SubRegsSet[] = { 0 }; 00744 const unsigned VRSAVE_SubRegsSet[] = { 0 }; 00745 const unsigned X0_SubRegsSet[] = { PPC::R0, 0 }; 00746 const unsigned X1_SubRegsSet[] = { PPC::R1, 0 }; 00747 const unsigned X10_SubRegsSet[] = { PPC::R10, 0 }; 00748 const unsigned X11_SubRegsSet[] = { PPC::R11, 0 }; 00749 const unsigned X12_SubRegsSet[] = { PPC::R12, 0 }; 00750 const unsigned X13_SubRegsSet[] = { PPC::R13, 0 }; 00751 const unsigned X14_SubRegsSet[] = { PPC::R14, 0 }; 00752 const unsigned X15_SubRegsSet[] = { PPC::R15, 0 }; 00753 const unsigned X16_SubRegsSet[] = { PPC::R16, 0 }; 00754 const unsigned X17_SubRegsSet[] = { PPC::R17, 0 }; 00755 const unsigned X18_SubRegsSet[] = { PPC::R18, 0 }; 00756 const unsigned X19_SubRegsSet[] = { PPC::R19, 0 }; 00757 const unsigned X2_SubRegsSet[] = { PPC::R2, 0 }; 00758 const unsigned X20_SubRegsSet[] = { PPC::R20, 0 }; 00759 const unsigned X21_SubRegsSet[] = { PPC::R21, 0 }; 00760 const unsigned X22_SubRegsSet[] = { PPC::R22, 0 }; 00761 const unsigned X23_SubRegsSet[] = { PPC::R23, 0 }; 00762 const unsigned X24_SubRegsSet[] = { PPC::R24, 0 }; 00763 const unsigned X25_SubRegsSet[] = { PPC::R25, 0 }; 00764 const unsigned X26_SubRegsSet[] = { PPC::R26, 0 }; 00765 const unsigned X27_SubRegsSet[] = { PPC::R27, 0 }; 00766 const unsigned X28_SubRegsSet[] = { PPC::R28, 0 }; 00767 const unsigned X29_SubRegsSet[] = { PPC::R29, 0 }; 00768 const unsigned X3_SubRegsSet[] = { PPC::R3, 0 }; 00769 const unsigned X30_SubRegsSet[] = { PPC::R30, 0 }; 00770 const unsigned X31_SubRegsSet[] = { PPC::R31, 0 }; 00771 const unsigned X4_SubRegsSet[] = { PPC::R4, 0 }; 00772 const unsigned X5_SubRegsSet[] = { PPC::R5, 0 }; 00773 const unsigned X6_SubRegsSet[] = { PPC::R6, 0 }; 00774 const unsigned X7_SubRegsSet[] = { PPC::R7, 0 }; 00775 const unsigned X8_SubRegsSet[] = { PPC::R8, 0 }; 00776 const unsigned X9_SubRegsSet[] = { PPC::R9, 0 }; 00777 00778 00779 // Register Super-registers Sets... 00780 const unsigned Empty_SuperRegsSet[] = { 0 }; 00781 const unsigned R0_SuperRegsSet[] = { PPC::X0, 0 }; 00782 const unsigned R1_SuperRegsSet[] = { PPC::X1, 0 }; 00783 const unsigned R10_SuperRegsSet[] = { PPC::X10, 0 }; 00784 const unsigned R11_SuperRegsSet[] = { PPC::X11, 0 }; 00785 const unsigned R12_SuperRegsSet[] = { PPC::X12, 0 }; 00786 const unsigned R13_SuperRegsSet[] = { PPC::X13, 0 }; 00787 const unsigned R14_SuperRegsSet[] = { PPC::X14, 0 }; 00788 const unsigned R15_SuperRegsSet[] = { PPC::X15, 0 }; 00789 const unsigned R16_SuperRegsSet[] = { PPC::X16, 0 }; 00790 const unsigned R17_SuperRegsSet[] = { PPC::X17, 0 }; 00791 const unsigned R18_SuperRegsSet[] = { PPC::X18, 0 }; 00792 const unsigned R19_SuperRegsSet[] = { PPC::X19, 0 }; 00793 const unsigned R2_SuperRegsSet[] = { PPC::X2, 0 }; 00794 const unsigned R20_SuperRegsSet[] = { PPC::X20, 0 }; 00795 const unsigned R21_SuperRegsSet[] = { PPC::X21, 0 }; 00796 const unsigned R22_SuperRegsSet[] = { PPC::X22, 0 }; 00797 const unsigned R23_SuperRegsSet[] = { PPC::X23, 0 }; 00798 const unsigned R24_SuperRegsSet[] = { PPC::X24, 0 }; 00799 const unsigned R25_SuperRegsSet[] = { PPC::X25, 0 }; 00800 const unsigned R26_SuperRegsSet[] = { PPC::X26, 0 }; 00801 const unsigned R27_SuperRegsSet[] = { PPC::X27, 0 }; 00802 const unsigned R28_SuperRegsSet[] = { PPC::X28, 0 }; 00803 const unsigned R29_SuperRegsSet[] = { PPC::X29, 0 }; 00804 const unsigned R3_SuperRegsSet[] = { PPC::X3, 0 }; 00805 const unsigned R30_SuperRegsSet[] = { PPC::X30, 0 }; 00806 const unsigned R31_SuperRegsSet[] = { PPC::X31, 0 }; 00807 const unsigned R4_SuperRegsSet[] = { PPC::X4, 0 }; 00808 const unsigned R5_SuperRegsSet[] = { PPC::X5, 0 }; 00809 const unsigned R6_SuperRegsSet[] = { PPC::X6, 0 }; 00810 const unsigned R7_SuperRegsSet[] = { PPC::X7, 0 }; 00811 const unsigned R8_SuperRegsSet[] = { PPC::X8, 0 }; 00812 const unsigned R9_SuperRegsSet[] = { PPC::X9, 0 }; 00813 00814 const TargetRegisterDesc RegisterDescriptors[] = { // Descriptors 00815 { "NOREG", "NOREG", 0, 0, 0 }, 00816 { "cr0", "CR0", Empty_AliasSet, CR0_SubRegsSet, Empty_SuperRegsSet }, 00817 { "2", "CR0EQ", Empty_AliasSet, CR0EQ_SubRegsSet, Empty_SuperRegsSet }, 00818 { "1", "CR0GT", Empty_AliasSet, CR0GT_SubRegsSet, Empty_SuperRegsSet }, 00819 { "0", "CR0LT", Empty_AliasSet, CR0LT_SubRegsSet, Empty_SuperRegsSet }, 00820 { "3", "CR0UN", Empty_AliasSet, CR0UN_SubRegsSet, Empty_SuperRegsSet }, 00821 { "cr1", "CR1", Empty_AliasSet, CR1_SubRegsSet, Empty_SuperRegsSet }, 00822 { "6", "CR1EQ", Empty_AliasSet, CR1EQ_SubRegsSet, Empty_SuperRegsSet }, 00823 { "5", "CR1GT", Empty_AliasSet, CR1GT_SubRegsSet, Empty_SuperRegsSet }, 00824 { "4", "CR1LT", Empty_AliasSet, CR1LT_SubRegsSet, Empty_SuperRegsSet }, 00825 { "7", "CR1UN", Empty_AliasSet, CR1UN_SubRegsSet, Empty_SuperRegsSet }, 00826 { "cr2", "CR2", Empty_AliasSet, CR2_SubRegsSet, Empty_SuperRegsSet }, 00827 { "10", "CR2EQ", Empty_AliasSet, CR2EQ_SubRegsSet, Empty_SuperRegsSet }, 00828 { "9", "CR2GT", Empty_AliasSet, CR2GT_SubRegsSet, Empty_SuperRegsSet }, 00829 { "8", "CR2LT", Empty_AliasSet, CR2LT_SubRegsSet, Empty_SuperRegsSet }, 00830 { "11", "CR2UN", Empty_AliasSet, CR2UN_SubRegsSet, Empty_SuperRegsSet }, 00831 { "cr3", "CR3", Empty_AliasSet, CR3_SubRegsSet, Empty_SuperRegsSet }, 00832 { "14", "CR3EQ", Empty_AliasSet, CR3EQ_SubRegsSet, Empty_SuperRegsSet }, 00833 { "13", "CR3GT", Empty_AliasSet, CR3GT_SubRegsSet, Empty_SuperRegsSet }, 00834 { "12", "CR3LT", Empty_AliasSet, CR3LT_SubRegsSet, Empty_SuperRegsSet }, 00835 { "15", "CR3UN", Empty_AliasSet, CR3UN_SubRegsSet, Empty_SuperRegsSet }, 00836 { "cr4", "CR4", Empty_AliasSet, CR4_SubRegsSet, Empty_SuperRegsSet }, 00837 { "18", "CR4EQ", Empty_AliasSet, CR4EQ_SubRegsSet, Empty_SuperRegsSet }, 00838 { "17", "CR4GT", Empty_AliasSet, CR4GT_SubRegsSet, Empty_SuperRegsSet }, 00839 { "16", "CR4LT", Empty_AliasSet, CR4LT_SubRegsSet, Empty_SuperRegsSet }, 00840 { "19", "CR4UN", Empty_AliasSet, CR4UN_SubRegsSet, Empty_SuperRegsSet }, 00841 { "cr5", "CR5", Empty_AliasSet, CR5_SubRegsSet, Empty_SuperRegsSet }, 00842 { "22", "CR5EQ", Empty_AliasSet, CR5EQ_SubRegsSet, Empty_SuperRegsSet }, 00843 { "21", "CR5GT", Empty_AliasSet, CR5GT_SubRegsSet, Empty_SuperRegsSet }, 00844 { "20", "CR5LT", Empty_AliasSet, CR5LT_SubRegsSet, Empty_SuperRegsSet }, 00845 { "23", "CR5UN", Empty_AliasSet, CR5UN_SubRegsSet, Empty_SuperRegsSet }, 00846 { "cr6", "CR6", Empty_AliasSet, CR6_SubRegsSet, Empty_SuperRegsSet }, 00847 { "26", "CR6EQ", Empty_AliasSet, CR6EQ_SubRegsSet, Empty_SuperRegsSet }, 00848 { "25", "CR6GT", Empty_AliasSet, CR6GT_SubRegsSet, Empty_SuperRegsSet }, 00849 { "24", "CR6LT", Empty_AliasSet, CR6LT_SubRegsSet, Empty_SuperRegsSet }, 00850 { "27", "CR6UN", Empty_AliasSet, CR6UN_SubRegsSet, Empty_SuperRegsSet }, 00851 { "cr7", "CR7", Empty_AliasSet, CR7_SubRegsSet, Empty_SuperRegsSet }, 00852 { "30", "CR7EQ", Empty_AliasSet, CR7EQ_SubRegsSet, Empty_SuperRegsSet }, 00853 { "29", "CR7GT", Empty_AliasSet, CR7GT_SubRegsSet, Empty_SuperRegsSet }, 00854 { "28", "CR7LT", Empty_AliasSet, CR7LT_SubRegsSet, Empty_SuperRegsSet }, 00855 { "31", "CR7UN", Empty_AliasSet, CR7UN_SubRegsSet, Empty_SuperRegsSet }, 00856 { "ctr", "CTR", Empty_AliasSet, CTR_SubRegsSet, Empty_SuperRegsSet }, 00857 { "ctr", "CTR8", Empty_AliasSet, CTR8_SubRegsSet, Empty_SuperRegsSet }, 00858 { "f0", "F0", Empty_AliasSet, F0_SubRegsSet, Empty_SuperRegsSet }, 00859 { "f1", "F1", Empty_AliasSet, F1_SubRegsSet, Empty_SuperRegsSet }, 00860 { "f10", "F10", Empty_AliasSet, F10_SubRegsSet, Empty_SuperRegsSet }, 00861 { "f11", "F11", Empty_AliasSet, F11_SubRegsSet, Empty_SuperRegsSet }, 00862 { "f12", "F12", Empty_AliasSet, F12_SubRegsSet, Empty_SuperRegsSet }, 00863 { "f13", "F13", Empty_AliasSet, F13_SubRegsSet, Empty_SuperRegsSet }, 00864 { "f14", "F14", Empty_AliasSet, F14_SubRegsSet, Empty_SuperRegsSet }, 00865 { "f15", "F15", Empty_AliasSet, F15_SubRegsSet, Empty_SuperRegsSet }, 00866 { "f16", "F16", Empty_AliasSet, F16_SubRegsSet, Empty_SuperRegsSet }, 00867 { "f17", "F17", Empty_AliasSet, F17_SubRegsSet, Empty_SuperRegsSet }, 00868 { "f18", "F18", Empty_AliasSet, F18_SubRegsSet, Empty_SuperRegsSet }, 00869 { "f19", "F19", Empty_AliasSet, F19_SubRegsSet, Empty_SuperRegsSet }, 00870 { "f2", "F2", Empty_AliasSet, F2_SubRegsSet, Empty_SuperRegsSet }, 00871 { "f20", "F20", Empty_AliasSet, F20_SubRegsSet, Empty_SuperRegsSet }, 00872 { "f21", "F21", Empty_AliasSet, F21_SubRegsSet, Empty_SuperRegsSet }, 00873 { "f22", "F22", Empty_AliasSet, F22_SubRegsSet, Empty_SuperRegsSet }, 00874 { "f23", "F23", Empty_AliasSet, F23_SubRegsSet, Empty_SuperRegsSet }, 00875 { "f24", "F24", Empty_AliasSet, F24_SubRegsSet, Empty_SuperRegsSet }, 00876 { "f25", "F25", Empty_AliasSet, F25_SubRegsSet, Empty_SuperRegsSet }, 00877 { "f26", "F26", Empty_AliasSet, F26_SubRegsSet, Empty_SuperRegsSet }, 00878 { "f27", "F27", Empty_AliasSet, F27_SubRegsSet, Empty_SuperRegsSet }, 00879 { "f28", "F28", Empty_AliasSet, F28_SubRegsSet, Empty_SuperRegsSet }, 00880 { "f29", "F29", Empty_AliasSet, F29_SubRegsSet, Empty_SuperRegsSet }, 00881 { "f3", "F3", Empty_AliasSet, F3_SubRegsSet, Empty_SuperRegsSet }, 00882 { "f30", "F30", Empty_AliasSet, F30_SubRegsSet, Empty_SuperRegsSet }, 00883 { "f31", "F31", Empty_AliasSet, F31_SubRegsSet, Empty_SuperRegsSet }, 00884 { "f4", "F4", Empty_AliasSet, F4_SubRegsSet, Empty_SuperRegsSet }, 00885 { "f5", "F5", Empty_AliasSet, F5_SubRegsSet, Empty_SuperRegsSet }, 00886 { "f6", "F6", Empty_AliasSet, F6_SubRegsSet, Empty_SuperRegsSet }, 00887 { "f7", "F7", Empty_AliasSet, F7_SubRegsSet, Empty_SuperRegsSet }, 00888 { "f8", "F8", Empty_AliasSet, F8_SubRegsSet, Empty_SuperRegsSet }, 00889 { "f9", "F9", Empty_AliasSet, F9_SubRegsSet, Empty_SuperRegsSet }, 00890 { "lr", "LR", Empty_AliasSet, LR_SubRegsSet, Empty_SuperRegsSet }, 00891 { "lr", "LR8", Empty_AliasSet, LR8_SubRegsSet, Empty_SuperRegsSet }, 00892 { "r0", "R0", R0_AliasSet, R0_SubRegsSet, R0_SuperRegsSet }, 00893 { "r1", "R1", R1_AliasSet, R1_SubRegsSet, R1_SuperRegsSet }, 00894 { "r10", "R10", R10_AliasSet, R10_SubRegsSet, R10_SuperRegsSet }, 00895 { "r11", "R11", R11_AliasSet, R11_SubRegsSet, R11_SuperRegsSet }, 00896 { "r12", "R12", R12_AliasSet, R12_SubRegsSet, R12_SuperRegsSet }, 00897 { "r13", "R13", R13_AliasSet, R13_SubRegsSet, R13_SuperRegsSet }, 00898 { "r14", "R14", R14_AliasSet, R14_SubRegsSet, R14_SuperRegsSet }, 00899 { "r15", "R15", R15_AliasSet, R15_SubRegsSet, R15_SuperRegsSet }, 00900 { "r16", "R16", R16_AliasSet, R16_SubRegsSet, R16_SuperRegsSet }, 00901 { "r17", "R17", R17_AliasSet, R17_SubRegsSet, R17_SuperRegsSet }, 00902 { "r18", "R18", R18_AliasSet, R18_SubRegsSet, R18_SuperRegsSet }, 00903 { "r19", "R19", R19_AliasSet, R19_SubRegsSet, R19_SuperRegsSet }, 00904 { "r2", "R2", R2_AliasSet, R2_SubRegsSet, R2_SuperRegsSet }, 00905 { "r20", "R20", R20_AliasSet, R20_SubRegsSet, R20_SuperRegsSet }, 00906 { "r21", "R21", R21_AliasSet, R21_SubRegsSet, R21_SuperRegsSet }, 00907 { "r22", "R22", R22_AliasSet, R22_SubRegsSet, R22_SuperRegsSet }, 00908 { "r23", "R23", R23_AliasSet, R23_SubRegsSet, R23_SuperRegsSet }, 00909 { "r24", "R24", R24_AliasSet, R24_SubRegsSet, R24_SuperRegsSet }, 00910 { "r25", "R25", R25_AliasSet, R25_SubRegsSet, R25_SuperRegsSet }, 00911 { "r26", "R26", R26_AliasSet, R26_SubRegsSet, R26_SuperRegsSet }, 00912 { "r27", "R27", R27_AliasSet, R27_SubRegsSet, R27_SuperRegsSet }, 00913 { "r28", "R28", R28_AliasSet, R28_SubRegsSet, R28_SuperRegsSet }, 00914 { "r29", "R29", R29_AliasSet, R29_SubRegsSet, R29_SuperRegsSet }, 00915 { "r3", "R3", R3_AliasSet, R3_SubRegsSet, R3_SuperRegsSet }, 00916 { "r30", "R30", R30_AliasSet, R30_SubRegsSet, R30_SuperRegsSet }, 00917 { "r31", "R31", R31_AliasSet, R31_SubRegsSet, R31_SuperRegsSet }, 00918 { "r4", "R4", R4_AliasSet, R4_SubRegsSet, R4_SuperRegsSet }, 00919 { "r5", "R5", R5_AliasSet, R5_SubRegsSet, R5_SuperRegsSet }, 00920 { "r6", "R6", R6_AliasSet, R6_SubRegsSet, R6_SuperRegsSet }, 00921 { "r7", "R7", R7_AliasSet, R7_SubRegsSet, R7_SuperRegsSet }, 00922 { "r8", "R8", R8_AliasSet, R8_SubRegsSet, R8_SuperRegsSet }, 00923 { "r9", "R9", R9_AliasSet, R9_SubRegsSet, R9_SuperRegsSet }, 00924 { "**ROUNDING MODE**", "RM", Empty_AliasSet, RM_SubRegsSet, Empty_SuperRegsSet }, 00925 { "v0", "V0", Empty_AliasSet, V0_SubRegsSet, Empty_SuperRegsSet }, 00926 { "v1", "V1", Empty_AliasSet, V1_SubRegsSet, Empty_SuperRegsSet }, 00927 { "v10", "V10", Empty_AliasSet, V10_SubRegsSet, Empty_SuperRegsSet }, 00928 { "v11", "V11", Empty_AliasSet, V11_SubRegsSet, Empty_SuperRegsSet }, 00929 { "v12", "V12", Empty_AliasSet, V12_SubRegsSet, Empty_SuperRegsSet }, 00930 { "v13", "V13", Empty_AliasSet, V13_SubRegsSet, Empty_SuperRegsSet }, 00931 { "v14", "V14", Empty_AliasSet, V14_SubRegsSet, Empty_SuperRegsSet }, 00932 { "v15", "V15", Empty_AliasSet, V15_SubRegsSet, Empty_SuperRegsSet }, 00933 { "v16", "V16", Empty_AliasSet, V16_SubRegsSet, Empty_SuperRegsSet }, 00934 { "v17", "V17", Empty_AliasSet, V17_SubRegsSet, Empty_SuperRegsSet }, 00935 { "v18", "V18", Empty_AliasSet, V18_SubRegsSet, Empty_SuperRegsSet }, 00936 { "v19", "V19", Empty_AliasSet, V19_SubRegsSet, Empty_SuperRegsSet }, 00937 { "v2", "V2", Empty_AliasSet, V2_SubRegsSet, Empty_SuperRegsSet }, 00938 { "v20", "V20", Empty_AliasSet, V20_SubRegsSet, Empty_SuperRegsSet }, 00939 { "v21", "V21", Empty_AliasSet, V21_SubRegsSet, Empty_SuperRegsSet }, 00940 { "v22", "V22", Empty_AliasSet, V22_SubRegsSet, Empty_SuperRegsSet }, 00941 { "v23", "V23", Empty_AliasSet, V23_SubRegsSet, Empty_SuperRegsSet }, 00942 { "v24", "V24", Empty_AliasSet, V24_SubRegsSet, Empty_SuperRegsSet }, 00943 { "v25", "V25", Empty_AliasSet, V25_SubRegsSet, Empty_SuperRegsSet }, 00944 { "v26", "V26", Empty_AliasSet, V26_SubRegsSet, Empty_SuperRegsSet }, 00945 { "v27", "V27", Empty_AliasSet, V27_SubRegsSet, Empty_SuperRegsSet }, 00946 { "v28", "V28", Empty_AliasSet, V28_SubRegsSet, Empty_SuperRegsSet }, 00947 { "v29", "V29", Empty_AliasSet, V29_SubRegsSet, Empty_SuperRegsSet }, 00948 { "v3", "V3", Empty_AliasSet, V3_SubRegsSet, Empty_SuperRegsSet }, 00949 { "v30", "V30", Empty_AliasSet, V30_SubRegsSet, Empty_SuperRegsSet }, 00950 { "v31", "V31", Empty_AliasSet, V31_SubRegsSet, Empty_SuperRegsSet }, 00951 { "v4", "V4", Empty_AliasSet, V4_SubRegsSet, Empty_SuperRegsSet }, 00952 { "v5", "V5", Empty_AliasSet, V5_SubRegsSet, Empty_SuperRegsSet }, 00953 { "v6", "V6", Empty_AliasSet, V6_SubRegsSet, Empty_SuperRegsSet }, 00954 { "v7", "V7", Empty_AliasSet, V7_SubRegsSet, Empty_SuperRegsSet }, 00955 { "v8", "V8", Empty_AliasSet, V8_SubRegsSet, Empty_SuperRegsSet }, 00956 { "v9", "V9", Empty_AliasSet, V9_SubRegsSet, Empty_SuperRegsSet }, 00957 { "VRsave", "VRSAVE", Empty_AliasSet, VRSAVE_SubRegsSet, Empty_SuperRegsSet }, 00958 { "r0", "X0", X0_AliasSet, X0_SubRegsSet, Empty_SuperRegsSet }, 00959 { "r1", "X1", X1_AliasSet, X1_SubRegsSet, Empty_SuperRegsSet }, 00960 { "r10", "X10", X10_AliasSet, X10_SubRegsSet, Empty_SuperRegsSet }, 00961 { "r11", "X11", X11_AliasSet, X11_SubRegsSet, Empty_SuperRegsSet }, 00962 { "r12", "X12", X12_AliasSet, X12_SubRegsSet, Empty_SuperRegsSet }, 00963 { "r13", "X13", X13_AliasSet, X13_SubRegsSet, Empty_SuperRegsSet }, 00964 { "r14", "X14", X14_AliasSet, X14_SubRegsSet, Empty_SuperRegsSet }, 00965 { "r15", "X15", X15_AliasSet, X15_SubRegsSet, Empty_SuperRegsSet }, 00966 { "r16", "X16", X16_AliasSet, X16_SubRegsSet, Empty_SuperRegsSet }, 00967 { "r17", "X17", X17_AliasSet, X17_SubRegsSet, Empty_SuperRegsSet }, 00968 { "r18", "X18", X18_AliasSet, X18_SubRegsSet, Empty_SuperRegsSet }, 00969 { "r19", "X19", X19_AliasSet, X19_SubRegsSet, Empty_SuperRegsSet }, 00970 { "r2", "X2", X2_AliasSet, X2_SubRegsSet, Empty_SuperRegsSet }, 00971 { "r20", "X20", X20_AliasSet, X20_SubRegsSet, Empty_SuperRegsSet }, 00972 { "r21", "X21", X21_AliasSet, X21_SubRegsSet, Empty_SuperRegsSet }, 00973 { "r22", "X22", X22_AliasSet, X22_SubRegsSet, Empty_SuperRegsSet }, 00974 { "r23", "X23", X23_AliasSet, X23_SubRegsSet, Empty_SuperRegsSet }, 00975 { "r24", "X24", X24_AliasSet, X24_SubRegsSet, Empty_SuperRegsSet }, 00976 { "r25", "X25", X25_AliasSet, X25_SubRegsSet, Empty_SuperRegsSet }, 00977 { "r26", "X26", X26_AliasSet, X26_SubRegsSet, Empty_SuperRegsSet }, 00978 { "r27", "X27", X27_AliasSet, X27_SubRegsSet, Empty_SuperRegsSet }, 00979 { "r28", "X28", X28_AliasSet, X28_SubRegsSet, Empty_SuperRegsSet }, 00980 { "r29", "X29", X29_AliasSet, X29_SubRegsSet, Empty_SuperRegsSet }, 00981 { "r3", "X3", X3_AliasSet, X3_SubRegsSet, Empty_SuperRegsSet }, 00982 { "r30", "X30", X30_AliasSet, X30_SubRegsSet, Empty_SuperRegsSet }, 00983 { "r31", "X31", X31_AliasSet, X31_SubRegsSet, Empty_SuperRegsSet }, 00984 { "r4", "X4", X4_AliasSet, X4_SubRegsSet, Empty_SuperRegsSet }, 00985 { "r5", "X5", X5_AliasSet, X5_SubRegsSet, Empty_SuperRegsSet }, 00986 { "r6", "X6", X6_AliasSet, X6_SubRegsSet, Empty_SuperRegsSet }, 00987 { "r7", "X7", X7_AliasSet, X7_SubRegsSet, Empty_SuperRegsSet }, 00988 { "r8", "X8", X8_AliasSet, X8_SubRegsSet, Empty_SuperRegsSet }, 00989 { "r9", "X9", X9_AliasSet, X9_SubRegsSet, Empty_SuperRegsSet }, 00990 }; 00991 } 00992 00993 unsigned PPCGenRegisterInfo::getSubReg(unsigned RegNo, unsigned Index) const { 00994 switch (RegNo) { 00995 default: 00996 return 0; 00997 case PPC::CR0: 00998 switch (Index) { 00999 default: return 0; 01000 case 1: return PPC::CR0LT; 01001 case 2: return PPC::CR0GT; 01002 case 3: return PPC::CR0EQ; 01003 case 4: return PPC::CR0UN; 01004 }; 01005 break; 01006 case PPC::CR1: 01007 switch (Index) { 01008 default: return 0; 01009 case 1: return PPC::CR1LT; 01010 case 2: return PPC::CR1GT; 01011 case 3: return PPC::CR1EQ; 01012 case 4: return PPC::CR1UN; 01013 }; 01014 break; 01015 case PPC::CR2: 01016 switch (Index) { 01017 default: return 0; 01018 case 1: return PPC::CR2LT; 01019 case 2: return PPC::CR2GT; 01020 case 3: return PPC::CR2EQ; 01021 case 4: return PPC::CR2UN; 01022 }; 01023 break; 01024 case PPC::CR3: 01025 switch (Index) { 01026 default: return 0; 01027 case 1: return PPC::CR3LT; 01028 case 2: return PPC::CR3GT; 01029 case 3: return PPC::CR3EQ; 01030 case 4: return PPC::CR3UN; 01031 }; 01032 break; 01033 case PPC::CR4: 01034 switch (Index) { 01035 default: return 0; 01036 case 1: return PPC::CR4LT; 01037 case 2: return PPC::CR4GT; 01038 case 3: return PPC::CR4EQ; 01039 case 4: return PPC::CR4UN; 01040 }; 01041 break; 01042 case PPC::CR5: 01043 switch (Index) { 01044 default: return 0; 01045 case 1: return PPC::CR5LT; 01046 case 2: return PPC::CR5GT; 01047 case 3: return PPC::CR5EQ; 01048 case 4: return PPC::CR5UN; 01049 }; 01050 break; 01051 case PPC::CR6: 01052 switch (Index) { 01053 default: return 0; 01054 case 1: return PPC::CR6LT; 01055 case 2: return PPC::CR6GT; 01056 case 3: return PPC::CR6EQ; 01057 case 4: return PPC::CR6UN; 01058 }; 01059 break; 01060 case PPC::CR7: 01061 switch (Index) { 01062 default: return 0; 01063 case 1: return PPC::CR7LT; 01064 case 2: return PPC::CR7GT; 01065 case 3: return PPC::CR7EQ; 01066 case 4: return PPC::CR7UN; 01067 }; 01068 break; 01069 }; 01070 return 0; 01071 } 01072 01073 PPCGenRegisterInfo::PPCGenRegisterInfo(int CallFrameSetupOpcode, int CallFrameDestroyOpcode) 01074 : TargetRegisterInfo(RegisterDescriptors, 175, RegisterClasses, RegisterClasses+9, 01075 CallFrameSetupOpcode, CallFrameDestroyOpcode, 01076 SubregHashTable, SubregHashTableSize) { 01077 } 01078 01079 int PPCGenRegisterInfo::getDwarfRegNumFull(unsigned RegNum, unsigned Flavour) const { 01080 switch (Flavour) { 01081 default: 01082 assert(0 && "Unknown DWARF flavour"); 01083 return -1; 01084 case 0: 01085 switch (RegNum) { 01086 default: 01087 assert(0 && "Invalid RegNum"); 01088 return -1; 01089 case PPC::CR0: 01090 return 68; 01091 case PPC::CR0EQ: 01092 return 0; 01093 case PPC::CR0GT: 01094 return 0; 01095 case PPC::CR0LT: 01096 return 0; 01097 case PPC::CR0UN: 01098 return 0; 01099 case PPC::CR1: 01100 return 69; 01101 case PPC::CR1EQ: 01102 return 0; 01103 case PPC::CR1GT: 01104 return 0; 01105 case PPC::CR1LT: 01106 return 0; 01107 case PPC::CR1UN: 01108 return 0; 01109 case PPC::CR2: 01110 return 70; 01111 case PPC::CR2EQ: 01112 return 0; 01113 case PPC::CR2GT: 01114 return 0; 01115 case PPC::CR2LT: 01116 return 0; 01117 case PPC::CR2UN: 01118 return 0; 01119 case PPC::CR3: 01120 return 71; 01121 case PPC::CR3EQ: 01122 return 0; 01123 case PPC::CR3GT: 01124 return 0; 01125 case PPC::CR3LT: 01126 return 0; 01127 case PPC::CR3UN: 01128 return 0; 01129 case PPC::CR4: 01130 return 72; 01131 case PPC::CR4EQ: 01132 return 0; 01133 case PPC::CR4GT: 01134 return 0; 01135 case PPC::CR4LT: 01136 return 0; 01137 case PPC::CR4UN: 01138 return 0; 01139 case PPC::CR5: 01140 return 73; 01141 case PPC::CR5EQ: 01142 return 0; 01143 case PPC::CR5GT: 01144 return 0; 01145 case PPC::CR5LT: 01146 return 0; 01147 case PPC::CR5UN: 01148 return 0; 01149 case PPC::CR6: 01150 return 74; 01151 case PPC::CR6EQ: 01152 return 0; 01153 case PPC::CR6GT: 01154 return 0; 01155 case PPC::CR6LT: 01156 return 0; 01157 case PPC::CR6UN: 01158 return 0; 01159 case PPC::CR7: 01160 return 75; 01161 case PPC::CR7EQ: 01162 return 0; 01163 case PPC::CR7GT: 01164 return 0; 01165 case PPC::CR7LT: 01166 return 0; 01167 case PPC::CR7UN: 01168 return 0; 01169 case PPC::CTR: 01170 return 66; 01171 case PPC::CTR8: 01172 return 66; 01173 case PPC::F0: 01174 return 32; 01175 case PPC::F1: 01176 return 33; 01177 case PPC::F10: 01178 return 42; 01179 case PPC::F11: 01180 return 43; 01181 case PPC::F12: 01182 return 44; 01183 case PPC::F13: 01184 return 45; 01185 case PPC::F14: 01186 return 46; 01187 case PPC::F15: 01188 return 47; 01189 case PPC::F16: 01190 return 48; 01191 case PPC::F17: 01192 return 49; 01193 case PPC::F18: 01194 return 50; 01195 case PPC::F19: 01196 return 51; 01197 case PPC::F2: 01198 return 34; 01199 case PPC::F20: 01200 return 52; 01201 case PPC::F21: 01202 return 53; 01203 case PPC::F22: 01204 return 54; 01205 case PPC::F23: 01206 return 55; 01207 case PPC::F24: 01208 return 56; 01209 case PPC::F25: 01210 return 57; 01211 case PPC::F26: 01212 return 58; 01213 case PPC::F27: 01214 return 59; 01215 case PPC::F28: 01216 return 60; 01217 case PPC::F29: 01218 return 61; 01219 case PPC::F3: 01220 return 35; 01221 case PPC::F30: 01222 return 62; 01223 case PPC::F31: 01224 return 63; 01225 case PPC::F4: 01226 return 36; 01227 case PPC::F5: 01228 return 37; 01229 case PPC::F6: 01230 return 38; 01231 case PPC::F7: 01232 return 39; 01233 case PPC::F8: 01234 return 40; 01235 case PPC::F9: 01236 return 41; 01237 case PPC::LR: 01238 return 65; 01239 case PPC::LR8: 01240 return 65; 01241 case PPC::R0: 01242 return 0; 01243 case PPC::R1: 01244 return 1; 01245 case PPC::R10: 01246 return 10; 01247 case PPC::R11: 01248 return 11; 01249 case PPC::R12: 01250 return 12; 01251 case PPC::R13: 01252 return 13; 01253 case PPC::R14: 01254 return 14; 01255 case PPC::R15: 01256 return 15; 01257 case PPC::R16: 01258 return 16; 01259 case PPC::R17: 01260 return 17; 01261 case PPC::R18: 01262 return 18; 01263 case PPC::R19: 01264 return 19; 01265 case PPC::R2: 01266 return 2; 01267 case PPC::R20: 01268 return 20; 01269 case PPC::R21: 01270 return 21; 01271 case PPC::R22: 01272 return 22; 01273 case PPC::R23: 01274 return 23; 01275 case PPC::R24: 01276 return 24; 01277 case PPC::R25: 01278 return 25; 01279 case PPC::R26: 01280 return 26; 01281 case PPC::R27: 01282 return 27; 01283 case PPC::R28: 01284 return 28; 01285 case PPC::R29: 01286 return 29; 01287 case PPC::R3: 01288 return 3; 01289 case PPC::R30: 01290 return 30; 01291 case PPC::R31: 01292 return 31; 01293 case PPC::R4: 01294 return 4; 01295 case PPC::R5: 01296 return 5; 01297 case PPC::R6: 01298 return 6; 01299 case PPC::R7: 01300 return 7; 01301 case PPC::R8: 01302 return 8; 01303 case PPC::R9: 01304 return 9; 01305 case PPC::RM: 01306 return 0; 01307 case PPC::V0: 01308 return 77; 01309 case PPC::V1: 01310 return 78; 01311 case PPC::V10: 01312 return 87; 01313 case PPC::V11: 01314 return 88; 01315 case PPC::V12: 01316 return 89; 01317 case PPC::V13: 01318 return 90; 01319 case PPC::V14: 01320 return 91; 01321 case PPC::V15: 01322 return 92; 01323 case PPC::V16: 01324 return 93; 01325 case PPC::V17: 01326 return 94; 01327 case PPC::V18: 01328 return 95; 01329 case PPC::V19: 01330 return 96; 01331 case PPC::V2: 01332 return 79; 01333 case PPC::V20: 01334 return 97; 01335 case PPC::V21: 01336 return 98; 01337 case PPC::V22: 01338 return 99; 01339 case PPC::V23: 01340 return 100; 01341 case PPC::V24: 01342 return 101; 01343 case PPC::V25: 01344 return 102; 01345 case PPC::V26: 01346 return 103; 01347 case PPC::V27: 01348 return 104; 01349 case PPC::V28: 01350 return 105; 01351 case PPC::V29: 01352 return 106; 01353 case PPC::V3: 01354 return 80; 01355 case PPC::V30: 01356 return 107; 01357 case PPC::V31: 01358 return 108; 01359 case PPC::V4: 01360 return 81; 01361 case PPC::V5: 01362 return 82; 01363 case PPC::V6: 01364 return 83; 01365 case PPC::V7: 01366 return 84; 01367 case PPC::V8: 01368 return 85; 01369 case PPC::V9: 01370 return 86; 01371 case PPC::VRSAVE: 01372 return 107; 01373 case PPC::X0: 01374 return 0; 01375 case PPC::X1: 01376 return 1; 01377 case PPC::X10: 01378 return 10; 01379 case PPC::X11: 01380 return 11; 01381 case PPC::X12: 01382 return 12; 01383 case PPC::X13: 01384 return 13; 01385 case PPC::X14: 01386 return 14; 01387 case PPC::X15: 01388 return 15; 01389 case PPC::X16: 01390 return 16; 01391 case PPC::X17: 01392 return 17; 01393 case PPC::X18: 01394 return 18; 01395 case PPC::X19: 01396 return 19; 01397 case PPC::X2: 01398 return 2; 01399 case PPC::X20: 01400 return 20; 01401 case PPC::X21: 01402 return 21; 01403 case PPC::X22: 01404 return 22; 01405 case PPC::X23: 01406 return 23; 01407 case PPC::X24: 01408 return 24; 01409 case PPC::X25: 01410 return 25; 01411 case PPC::X26: 01412 return 26; 01413 case PPC::X27: 01414 return 27; 01415 case PPC::X28: 01416 return 28; 01417 case PPC::X29: 01418 return 29; 01419 case PPC::X3: 01420 return 3; 01421 case PPC::X30: 01422 return 30; 01423 case PPC::X31: 01424 return 31; 01425 case PPC::X4: 01426 return 4; 01427 case PPC::X5: 01428 return 5; 01429 case PPC::X6: 01430 return 6; 01431 case PPC::X7: 01432 return 7; 01433 case PPC::X8: 01434 return 8; 01435 case PPC::X9: 01436 return 9; 01437 }; 01438 }; 01439 } 01440 01441 } // End llvm namespace