LLVM API Documentation

PPCHazardRecognizers.h

Go to the documentation of this file.
00001 //===-- PPCHazardRecognizers.h - PowerPC Hazard Recognizers -----*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file defines hazard recognizers for scheduling on PowerPC processors.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef PPCHAZRECS_H
00015 #define PPCHAZRECS_H
00016 
00017 #include "llvm/CodeGen/ScheduleHazardRecognizer.h"
00018 #include "llvm/CodeGen/SelectionDAGNodes.h"
00019 #include "PPCInstrInfo.h"
00020 
00021 namespace llvm {
00022   
00023 /// PPCHazardRecognizer970 - This class defines a finite state automata that
00024 /// models the dispatch logic on the PowerPC 970 (aka G5) processor.  This
00025 /// promotes good dispatch group formation and implements noop insertion to
00026 /// avoid structural hazards that cause significant performance penalties (e.g.
00027 /// setting the CTR register then branching through it within a dispatch group),
00028 /// or storing then loading from the same address within a dispatch group.
00029 class PPCHazardRecognizer970 : public ScheduleHazardRecognizer {
00030   const TargetInstrInfo &TII;
00031   
00032   unsigned NumIssued;  // Number of insts issued, including advanced cycles.
00033   
00034   // Various things that can cause a structural hazard.
00035   
00036   // HasCTRSet - If the CTR register is set in this group, disallow BCTRL.
00037   bool HasCTRSet;
00038   
00039   // StoredPtr - Keep track of the address of any store.  If we see a load from
00040   // the same address (or one that aliases it), disallow the store.  We can have
00041   // up to four stores in one dispatch group, hence we track up to 4.
00042   //
00043   // This is null if we haven't seen a store yet.  We keep track of both
00044   // operands of the store here, since we support [r+r] and [r+i] addressing.
00045   SDValue StorePtr1[4], StorePtr2[4];
00046   unsigned  StoreSize[4];
00047   unsigned NumStores;
00048   
00049 public:
00050   PPCHazardRecognizer970(const TargetInstrInfo &TII);
00051   virtual HazardType getHazardType(SUnit *SU);
00052   virtual void EmitInstruction(SUnit *SU);
00053   virtual void AdvanceCycle();
00054   
00055 private:
00056   /// EndDispatchGroup - Called when we are finishing a new dispatch group.
00057   ///
00058   void EndDispatchGroup();
00059   
00060   /// GetInstrType - Classify the specified powerpc opcode according to its
00061   /// pipeline.
00062   PPCII::PPC970_Unit GetInstrType(unsigned Opcode,
00063                                   bool &isFirst, bool &isSingle,bool &isCracked,
00064                                   bool &isLoad, bool &isStore);
00065   
00066   bool isLoadOfStoredAddress(unsigned LoadSize,
00067                              SDValue Ptr1, SDValue Ptr2) const;
00068 };
00069 
00070 } // end namespace llvm
00071 
00072 #endif
00073