PPCISelLowering.cpp File Reference

#include "PPCISelLowering.h"
#include "PPCMachineFunctionInfo.h"
#include "PPCPredicates.h"
#include "PPCTargetMachine.h"
#include "PPCPerfectShuffle.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/ADT/VectorExtras.h"
#include "llvm/CodeGen/CallingConvLower.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/PseudoSourceValue.h"
#include "llvm/CodeGen/SelectionDAG.h"
#include "llvm/CallingConv.h"
#include "llvm/Constants.h"
#include "llvm/Function.h"
#include "llvm/Intrinsics.h"
#include "llvm/Support/MathExtras.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Support/CommandLine.h"
#include "PPCGenCallingConv.inc"

Include dependency graph for PPCISelLowering.cpp:

Go to the source code of this file.

Functions
static bool	isFloatingPointZero (SDValue Op)
	isFloatingPointZero - Return true if this is 0.0 or -0.0.
static bool	isConstantOrUndef (SDValue Op, unsigned Val)
static bool	isVMerge (SDNode *N, unsigned UnitSize, unsigned LHSStart, unsigned RHSStart)
static bool	isIntS16Immediate (SDNode *N, short &Imm)
static bool	isIntS16Immediate (SDValue Op, short &Imm)
static const unsigned *	GetFPR (const PPCSubtarget &Subtarget)
static unsigned	CalculateStackSlotSize (SDValue Arg, ISD::ArgFlagsTy Flags, bool isVarArg, unsigned PtrByteSize)
static unsigned	CalculateParameterAndLinkageAreaSize (SelectionDAG &DAG, bool isPPC64, bool isMachoABI, bool isVarArg, unsigned CC, CallSDNode *TheCall, unsigned &nAltivecParamsAtEnd)
static int	CalculateTailCallSPDiff (SelectionDAG &DAG, bool IsTailCall, unsigned ParamSize)
static SDNode *	isBLACompatibleAddress (SDValue Op, SelectionDAG &DAG)
static void	StoreTailCallArgumentsToStackSlot (SelectionDAG &DAG, SDValue Chain, const SmallVector< TailCallArgumentInfo, 8 > &TailCallArgs, SmallVector< SDValue, 8 > &MemOpChains)
	StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot.
static SDValue	EmitTailCallStoreFPAndRetAddr (SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue OldRetAddr, SDValue OldFP, int SPDiff, bool isPPC64, bool isMachoABI)
static void	CalculateTailCallArgDest (SelectionDAG &DAG, MachineFunction &MF, bool isPPC64, SDValue Arg, int SPDiff, unsigned ArgOffset, SmallVector< TailCallArgumentInfo, 8 > &TailCallArguments)
static SDValue	CreateCopyOfByValArgument (SDValue Src, SDValue Dst, SDValue Chain, ISD::ArgFlagsTy Flags, SelectionDAG &DAG, unsigned Size)
static void	LowerMemOpCallTo (SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVector< SDValue, 8 > &MemOpChains, SmallVector< TailCallArgumentInfo, 8 > &TailCallArguments)
static bool	GetConstantBuildVectorBits (SDNode *BV, uint64_t VectorBits[2], uint64_t UndefBits[2])
static bool	isConstantSplat (const uint64_t Bits128[2], const uint64_t Undef128[2], unsigned &SplatBits, unsigned &SplatUndef, unsigned &SplatSize)
static SDValue	BuildSplatI (int Val, unsigned SplatSize, MVT VT, SelectionDAG &DAG)
static SDValue	BuildIntrinsicOp (unsigned IID, SDValue LHS, SDValue RHS, SelectionDAG &DAG, MVT DestVT=MVT::Other)
static SDValue	BuildIntrinsicOp (unsigned IID, SDValue Op0, SDValue Op1, SDValue Op2, SelectionDAG &DAG, MVT DestVT=MVT::Other)
static SDValue	BuildVSLDOI (SDValue LHS, SDValue RHS, unsigned Amt, MVT VT, SelectionDAG &DAG)
static SDValue	GeneratePerfectShuffle (unsigned PFEntry, SDValue LHS, SDValue RHS, SelectionDAG &DAG)
static bool	getAltivecCompareInfo (SDValue Intrin, int &CompareOpc, bool &isDot)
Variables
static cl::opt< bool >	EnablePPCPreinc ("enable-ppc-preinc", cl::desc("enable preincrement load/store generation on PPC (experimental)"), cl::Hidden)

---

Function Documentation

static SDValue BuildIntrinsicOp	(	unsigned	IID,
		SDValue	Op0,
		SDValue	Op1,
		SDValue	Op2,
		SelectionDAG &	DAG,
		MVT	DestVT = MVT::Other
	)			[static]

BuildIntrinsicOp - Return a ternary operator intrinsic node with the specified intrinsic ID.

Definition at line 3201 of file PPCISelLowering.cpp.

References llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::ISD::INTRINSIC_WO_CHAIN, and llvm::MVT::Other.

static SDValue BuildIntrinsicOp	(	unsigned	IID,
		SDValue	LHS,
		SDValue	RHS,
		SelectionDAG &	DAG,
		MVT	DestVT = MVT::Other
	)			[static]

BuildIntrinsicOp - Return a binary operator intrinsic node with the specified intrinsic ID.

Definition at line 3191 of file PPCISelLowering.cpp.

References llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::ISD::INTRINSIC_WO_CHAIN, and llvm::MVT::Other.

static SDValue BuildSplatI	(	int	Val,
		unsigned	SplatSize,
		MVT	VT,
		SelectionDAG &	DAG
	)			[static]

BuildSplatI - Build a canonical splati of Val with an element size of SplatSize. Cast the result to VT.

Definition at line 3164 of file PPCISelLowering.cpp.

References llvm::SmallVectorImpl< T >::assign(), llvm::ISD::BIT_CONVERT, llvm::ISD::BUILD_VECTOR, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::MVT::Other, llvm::SmallVectorImpl< T >::size(), llvm::MVT::v16i8, llvm::MVT::v4i32, and llvm::MVT::v8i16.

static SDValue BuildVSLDOI	(	SDValue	LHS,
		SDValue	RHS,
		unsigned	Amt,
		MVT	VT,
		SelectionDAG &	DAG
	)			[static]

BuildVSLDOI - Return a VECTOR_SHUFFLE that is a vsldoi of the specified amount. The result has the specified value type.

Definition at line 3212 of file PPCISelLowering.cpp.

References llvm::ISD::BIT_CONVERT, llvm::ISD::BUILD_VECTOR, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::MVT::i8, T, llvm::MVT::v16i8, and llvm::ISD::VECTOR_SHUFFLE.

Referenced by GeneratePerfectShuffle().

static unsigned CalculateParameterAndLinkageAreaSize	(	SelectionDAG &	DAG,
		bool	isPPC64,
		bool	isMachoABI,
		bool	isVarArg,
		unsigned	CC,
		CallSDNode *	TheCall,
		unsigned &	nAltivecParamsAtEnd
	)			[static]

CalculateParameterAndLinkageAreaSize - Get the size of the paramter plus linkage area.

Definition at line 1834 of file PPCISelLowering.cpp.

References Arg, CalculateStackSlotSize(), llvm::CallingConv::Fast, llvm::CallSDNode::getArg(), llvm::CallSDNode::getArgFlags(), llvm::TargetMachine::getFrameInfo(), llvm::PPCFrameInfo::getLinkageSize(), llvm::SelectionDAG::getMachineFunction(), llvm::PPCFrameInfo::getMinCallFrameSize(), llvm::CallSDNode::getNumArgs(), llvm::MachineFunction::getTarget(), llvm::SDValue::getValueType(), llvm::PerformTailCallOpt, llvm::MVT::v16i8, llvm::MVT::v4f32, llvm::MVT::v4i32, and llvm::MVT::v8i16.

static unsigned CalculateStackSlotSize	(	SDValue	Arg,
		ISD::ArgFlagsTy	Flags,
		bool	isVarArg,
		unsigned	PtrByteSize
	)			[static]

CalculateStackSlotSize - Calculates the size reserved for this argument on the stack.

Definition at line 1374 of file PPCISelLowering.cpp.

References llvm::ISD::ArgFlagsTy::getByValSize(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueType(), and llvm::ISD::ArgFlagsTy::isByVal().

Referenced by CalculateParameterAndLinkageAreaSize().

static void CalculateTailCallArgDest	(	SelectionDAG &	DAG,
		MachineFunction &	MF,
		bool	isPPC64,
		SDValue	Arg,
		int	SPDiff,
		unsigned	ArgOffset,
		SmallVector< TailCallArgumentInfo, 8 > &	TailCallArguments
	)			[static]

CalculateTailCallArgDest - Remember Argument for later processing. Calculate the position of the argument.

Definition at line 2034 of file PPCISelLowering.cpp.

References llvm::MachineFrameInfo::CreateFixedObject(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::MVT::i64, Offset, llvm::X86II::OpSize, and llvm::SmallVectorImpl< T >::push_back().

Referenced by LowerMemOpCallTo().

static int CalculateTailCallSPDiff	(	SelectionDAG &	DAG,
		bool	IsTailCall,
		unsigned	ParamSize
	)			[static]

CalculateTailCallSPDiff - Get the amount the stack pointer has to be adjusted to accomodate the arguments for the tailcall.

Definition at line 1901 of file PPCISelLowering.cpp.

References llvm::MachineFunction::getInfo(), llvm::SelectionDAG::getMachineFunction(), llvm::PPCFunctionInfo::getMinReservedArea(), and llvm::PPCFunctionInfo::setTailCallSPDelta().

static SDValue CreateCopyOfByValArgument	(	SDValue	Src,
		SDValue	Dst,
		SDValue	Chain,
		ISD::ArgFlagsTy	Flags,
		SelectionDAG &	DAG,
		unsigned	Size
	)			[static]

CreateCopyOfByValArgument - Make a copy of an aggregate at address specified by "Src" to address "Dst" of size "Size". Alignment information is specified by the specific parameter attribute. The copy will be passed as a byval function parameter. Sometimes what we are copying is the end of a larger object, the part that does not fit in registers.

Definition at line 2077 of file PPCISelLowering.cpp.

References llvm::ISD::ArgFlagsTy::getByValAlign(), llvm::SelectionDAG::getConstant(), and llvm::SelectionDAG::getMemcpy().

static SDValue EmitTailCallStoreFPAndRetAddr	(	SelectionDAG &	DAG,
		MachineFunction &	MF,
		SDValue	Chain,
		SDValue	OldRetAddr,
		SDValue	OldFP,
		int	SPDiff,
		bool	isPPC64,
		bool	isMachoABI
	)			[static]

EmitTailCallStoreFPAndRetAddr - Move the frame pointer and return address to the appropriate stack slot for the tail call optimized function call.

Definition at line 2001 of file PPCISelLowering.cpp.

References llvm::MachineFrameInfo::CreateFixedObject(), llvm::PseudoSourceValue::getFixedStack(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::PPCFrameInfo::getFramePointerSaveOffset(), llvm::PPCFrameInfo::getReturnSaveOffset(), llvm::SelectionDAG::getStore(), and llvm::MVT::i64.

static SDValue GeneratePerfectShuffle	(	unsigned	PFEntry,
		SDValue	LHS,
		SDValue	RHS,
		SelectionDAG &	DAG
	)			[static]

GeneratePerfectShuffle - Given an entry in the perfect-shuffle table, emit the specified operations to build the shuffle.

Definition at line 3396 of file PPCISelLowering.cpp.

References llvm::ISD::BUILD_VECTOR, BuildVSLDOI(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::SDValue::getValueType(), llvm::MVT::i8, PerfectShuffleTable, llvm::MVT::v16i8, and llvm::ISD::VECTOR_SHUFFLE.

static bool getAltivecCompareInfo	(	SDValue	Intrin,
		int &	CompareOpc,
		bool &	isDot
	)			[static]

getAltivecCompareInfo - Given an intrinsic, return false if it is not an altivec comparison. If it is, return true and fill in Opc/isDot with information about the intrinsic.

Definition at line 3598 of file PPCISelLowering.cpp.

References llvm::SDValue::getOperand(), llvm::Intrinsic::ppc_altivec_vcmpbfp, llvm::Intrinsic::ppc_altivec_vcmpbfp_p, llvm::Intrinsic::ppc_altivec_vcmpeqfp, llvm::Intrinsic::ppc_altivec_vcmpeqfp_p, llvm::Intrinsic::ppc_altivec_vcmpequb, llvm::Intrinsic::ppc_altivec_vcmpequb_p, llvm::Intrinsic::ppc_altivec_vcmpequh, llvm::Intrinsic::ppc_altivec_vcmpequh_p, llvm::Intrinsic::ppc_altivec_vcmpequw, llvm::Intrinsic::ppc_altivec_vcmpequw_p, llvm::Intrinsic::ppc_altivec_vcmpgefp, llvm::Intrinsic::ppc_altivec_vcmpgefp_p, llvm::Intrinsic::ppc_altivec_vcmpgtfp, llvm::Intrinsic::ppc_altivec_vcmpgtfp_p, llvm::Intrinsic::ppc_altivec_vcmpgtsb, llvm::Intrinsic::ppc_altivec_vcmpgtsb_p, llvm::Intrinsic::ppc_altivec_vcmpgtsh, llvm::Intrinsic::ppc_altivec_vcmpgtsh_p, llvm::Intrinsic::ppc_altivec_vcmpgtsw, llvm::Intrinsic::ppc_altivec_vcmpgtsw_p, llvm::Intrinsic::ppc_altivec_vcmpgtub, llvm::Intrinsic::ppc_altivec_vcmpgtub_p, llvm::Intrinsic::ppc_altivec_vcmpgtuh, llvm::Intrinsic::ppc_altivec_vcmpgtuh_p, llvm::Intrinsic::ppc_altivec_vcmpgtuw, and llvm::Intrinsic::ppc_altivec_vcmpgtuw_p.

Referenced by llvm::PPCTargetLowering::PerformDAGCombine().

static bool GetConstantBuildVectorBits	(	SDNode *	BV,
		uint64_t	VectorBits[2],
		uint64_t	UndefBits[2]
	)			[static]

Definition at line 3073 of file PPCISelLowering.cpp.

References llvm::MVT::f32, llvm::FloatToBits(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueType(), and llvm::ISD::UNDEF.

static const unsigned* GetFPR

(

const PPCSubtarget &

Subtarget

)

[static]

GetFPR - Get the set of FP registers that should be allocated for arguments, depending on which subtarget is selected.

Definition at line 1355 of file PPCISelLowering.cpp.

References llvm::PPCSubtarget::isMachoABI().

static SDNode* isBLACompatibleAddress	(	SDValue	Op,
		SelectionDAG &	DAG
	)			[static]

isCallCompatibleAddress - Return the immediate to use if the specified 32-bit value is representable in the immediate field of a BxA instruction.

Definition at line 1957 of file PPCISelLowering.cpp.

References llvm::dyn_cast(), llvm::SelectionDAG::getConstant(), llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getTargetLoweringInfo(), and llvm::ConstantSDNode::getZExtValue().

static bool isConstantOrUndef	(	SDValue	Op,
		unsigned	Val
	)			[static]

isConstantOrUndef - Op is either an undef node or a ConstantSDNode. Return true if Op is undef or if it matches the specified value.

Definition at line 459 of file PPCISelLowering.cpp.

References llvm::SDValue::getOpcode(), and llvm::ISD::UNDEF.

Referenced by isVMerge(), llvm::PPC::isVPKUHUMShuffleMask(), llvm::PPC::isVPKUWUMShuffleMask(), and llvm::PPC::isVSLDOIShuffleMask().

static bool isConstantSplat	(	const uint64_t	Bits128[2],
		const uint64_t	Undef128[2],
		unsigned &	SplatBits,
		unsigned &	SplatUndef,
		unsigned &	SplatSize
	)			[static]

Definition at line 3113 of file PPCISelLowering.cpp.

static bool isFloatingPointZero

(

SDValue

Op

)

[static]

isFloatingPointZero - Return true if this is 0.0 or -0.0.

Definition at line 445 of file PPCISelLowering.cpp.

References CP, llvm::SDValue::getNode(), llvm::SDValue::getOperand(), llvm::ISD::isEXTLoad(), and llvm::ISD::isNON_EXTLoad().

static bool isIntS16Immediate	(	SDValue	Op,
		short &	Imm
	)			[static]

Definition at line 759 of file PPCISelLowering.cpp.

References llvm::SDValue::getNode(), and isIntS16Immediate().

static bool isIntS16Immediate	(	SDNode *	N,
		short &	Imm
	)			[static]

isIntS16Immediate - This method tests to see if the node is either a 32-bit or 64-bit immediate, and if the value can be accurately represented as a sign extension from a 16-bit value. If so, this returns true and the immediate.

Definition at line 749 of file PPCISelLowering.cpp.

References llvm::ISD::Constant, llvm::SDNode::getOpcode(), llvm::SDNode::getValueType(), and llvm::MVT::i32.

static bool isVMerge	(	SDNode *	N,
		unsigned	UnitSize,
		unsigned	LHSStart,
		unsigned	RHSStart
	)			[static]

isVMerge - Common function, used to match vmrg* shuffles.

Definition at line 501 of file PPCISelLowering.cpp.

References llvm::ISD::BUILD_VECTOR, llvm::SDNode::getNumOperands(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), and isConstantOrUndef().

Referenced by llvm::PPC::isVMRGHShuffleMask(), and llvm::PPC::isVMRGLShuffleMask().

static void LowerMemOpCallTo	(	SelectionDAG &	DAG,
		MachineFunction &	MF,
		SDValue	Chain,
		SDValue	Arg,
		SDValue	PtrOff,
		int	SPDiff,
		unsigned	ArgOffset,
		bool	isPPC64,
		bool	isTailCall,
		bool	isVector,
		SmallVector< SDValue, 8 > &	MemOpChains,
		SmallVector< TailCallArgumentInfo, 8 > &	TailCallArguments
	)			[static]

LowerMemOpCallTo - Store the argument to the stack or remember it in case of tail calls.

Definition at line 2088 of file PPCISelLowering.cpp.

References llvm::ISD::ADD, CalculateTailCallArgDest(), llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getNode(), llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getRegister(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getTargetLoweringInfo(), llvm::MVT::i64, and llvm::SmallVectorImpl< T >::push_back().

static void StoreTailCallArgumentsToStackSlot	(	SelectionDAG &	DAG,
		SDValue	Chain,
		const SmallVector< TailCallArgumentInfo, 8 > &	TailCallArgs,
		SmallVector< SDValue, 8 > &	MemOpChains
	)			[static]

StoreTailCallArgumentsToStackSlot - Stores arguments to their stack slot.

Definition at line 1984 of file PPCISelLowering.cpp.

References Arg, llvm::PseudoSourceValue::getFixedStack(), llvm::SelectionDAG::getStore(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().

---

Variable Documentation

SDValue Arg

Definition at line 1973 of file PPCISelLowering.cpp.

Referenced by ByteswapSCANFResults(), CalculateParameterAndLinkageAreaSize(), CheckDAGForTailCallsAndFixThem(), isDynamicConstant(), llvm::SparcTargetLowering::LowerArguments(), LowerByteImmed(), LowerCALL(), llvm::PIC16TargetLowering::LowerCallArguments(), StoreTailCallArgumentsToStackSlot(), and StripDebugInfo().

cl::opt<bool> EnablePPCPreinc("enable-ppc-preinc", cl::desc("enable preincrement load/store generation on PPC (experimental)"), cl::Hidden) [static]

Referenced by llvm::PPCTargetLowering::getPreIndexedAddressParts().

int FrameIdx

Definition at line 1975 of file PPCISelLowering.cpp.

Referenced by llvm::SelectionDAG::CreateStackTemporary(), InferAlignment(), IsFixedFrameObjectWithPosOffset(), llvm::SparcTargetLowering::LowerArguments(), llvm::XCoreRegisterInfo::processFunctionBeforeCalleeSavedScan(), and llvm::X86RegisterInfo::processFunctionBeforeFrameFinalized().

SDValue FrameIdxOp

Definition at line 1974 of file PPCISelLowering.cpp.