LLVM API Documentation
00001 //===- PPCRegisterInfo.h - PowerPC Register Information Impl -----*- C++ -*-==// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file contains the PowerPC implementation of the TargetRegisterInfo 00011 // class. 00012 // 00013 //===----------------------------------------------------------------------===// 00014 00015 #ifndef POWERPC32_REGISTERINFO_H 00016 #define POWERPC32_REGISTERINFO_H 00017 00018 #include "PPC.h" 00019 #include "PPCGenRegisterInfo.h.inc" 00020 #include <map> 00021 00022 namespace llvm { 00023 class PPCSubtarget; 00024 class TargetInstrInfo; 00025 class Type; 00026 00027 class PPCRegisterInfo : public PPCGenRegisterInfo { 00028 std::map<unsigned, unsigned> ImmToIdxMap; 00029 const PPCSubtarget &Subtarget; 00030 const TargetInstrInfo &TII; 00031 public: 00032 PPCRegisterInfo(const PPCSubtarget &SubTarget, const TargetInstrInfo &tii); 00033 00034 /// getRegisterNumbering - Given the enum value for some register, e.g. 00035 /// PPC::F14, return the number that it corresponds to (e.g. 14). 00036 static unsigned getRegisterNumbering(unsigned RegEnum); 00037 00038 /// Code Generation virtual methods... 00039 const unsigned *getCalleeSavedRegs(const MachineFunction* MF = 0) const; 00040 00041 const TargetRegisterClass* const* 00042 getCalleeSavedRegClasses(const MachineFunction *MF = 0) const; 00043 00044 BitVector getReservedRegs(const MachineFunction &MF) const; 00045 00046 /// targetHandlesStackFrameRounding - Returns true if the target is 00047 /// responsible for rounding up the stack frame (probably at emitPrologue 00048 /// time). 00049 bool targetHandlesStackFrameRounding() const { return true; } 00050 00051 /// requiresRegisterScavenging - We require a register scavenger. 00052 /// FIXME (64-bit): Should be inlined. 00053 bool requiresRegisterScavenging(const MachineFunction &MF) const; 00054 00055 bool hasFP(const MachineFunction &MF) const; 00056 00057 void eliminateCallFramePseudoInstr(MachineFunction &MF, 00058 MachineBasicBlock &MBB, 00059 MachineBasicBlock::iterator I) const; 00060 00061 void lowerDynamicAlloc(MachineBasicBlock::iterator II, 00062 int SPAdj, RegScavenger *RS) const; 00063 void lowerCRSpilling(MachineBasicBlock::iterator II, unsigned FrameIndex, 00064 int SPAdj, RegScavenger *RS) const; 00065 void eliminateFrameIndex(MachineBasicBlock::iterator II, 00066 int SPAdj, RegScavenger *RS = NULL) const; 00067 00068 /// determineFrameLayout - Determine the size of the frame and maximum call 00069 /// frame size. 00070 void determineFrameLayout(MachineFunction &MF) const; 00071 00072 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF, 00073 RegScavenger *RS = NULL) const; 00074 void emitPrologue(MachineFunction &MF) const; 00075 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const; 00076 00077 // Debug information queries. 00078 unsigned getRARegister() const; 00079 unsigned getFrameRegister(MachineFunction &MF) const; 00080 void getInitialFrameState(std::vector<MachineMove> &Moves) const; 00081 00082 // Exception handling queries. 00083 unsigned getEHExceptionRegister() const; 00084 unsigned getEHHandlerRegister() const; 00085 00086 int getDwarfRegNum(unsigned RegNum, bool isEH) const; 00087 }; 00088 00089 } // end namespace llvm 00090 00091 #endif