PostRASchedulerList.cpp File Reference

#include "llvm/CodeGen/Passes.h"
#include "llvm/CodeGen/ScheduleDAGInstrs.h"
#include "llvm/CodeGen/LatencyPriorityQueue.h"
#include "llvm/CodeGen/SchedulerRegistry.h"
#include "llvm/CodeGen/MachineDominators.h"
#include "llvm/CodeGen/MachineFunctionPass.h"
#include "llvm/CodeGen/MachineLoopInfo.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/TargetRegisterInfo.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/Debug.h"
#include "llvm/ADT/Statistic.h"
#include <map>

Include dependency graph for PostRASchedulerList.cpp:

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Defines
#define	DEBUG_TYPE   "post-RA-sched"
Functions
	STATISTIC (NumNoops,"Number of noops inserted")
	STATISTIC (NumStalls,"Number of pipeline stalls")
static const TargetRegisterClass *	getInstrOperandRegClass (const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, const TargetInstrDesc &II, unsigned Op)
static SDep *	CriticalPathStep (SUnit *SU)
FunctionPass *	llvm::createPostRAScheduler ()
	createPostRAScheduler - under development.
Variables
static cl::opt< bool >	EnableAntiDepBreaking ("break-anti-dependencies", cl::desc("Break post-RA scheduling anti-dependencies"), cl::init(true), cl::Hidden)
static cl::opt< bool >	EnablePostRAHazardAvoidance ("avoid-hazards", cl::desc("Enable simple hazard-avoidance"), cl::init(true), cl::Hidden)

---

Define Documentation

#define DEBUG_TYPE   "post-RA-sched"

Definition at line 21 of file PostRASchedulerList.cpp.

---

Function Documentation

static SDep* CriticalPathStep

(

SUnit *

SU

)

[static]

CriticalPathStep - Return the next SUnit after SU on the bottom-up critical path.

Definition at line 249 of file PostRASchedulerList.cpp.

References llvm::SUnit::getDepth(), Next, and llvm::SUnit::Preds.

static const TargetRegisterClass* getInstrOperandRegClass	(	const TargetRegisterInfo *	TRI,
		const TargetInstrInfo *	TII,
		const TargetInstrDesc &	II,
		unsigned	Op
	)			[static]

getInstrOperandRegClass - Return register class of the operand of an instruction of the specified TargetInstrDesc.

Definition at line 237 of file PostRASchedulerList.cpp.

References llvm::TargetInstrDesc::getNumOperands(), llvm::TargetInstrInfo::getPointerRegClass(), llvm::TargetRegisterInfo::getRegClass(), llvm::TargetOperandInfo::isLookupPtrRegClass(), llvm::TargetInstrDesc::OpInfo, and llvm::TargetOperandInfo::RegClass.

STATISTIC	(	NumStalls	,
		"Number of pipeline stalls"
	)

STATISTIC	(	NumNoops	,
		"Number of noops inserted"
	)

---

Variable Documentation

const BitVector AllocatableSet

AllocatableSet - The set of allocatable registers. We'll be ignoring anti-dependencies on non-allocatable registers, because they may not be safe to break.

Definition at line 92 of file PostRASchedulerList.cpp.

LatencyPriorityQueue AvailableQueue

AvailableQueue - The priority queue to use for the available SUnits.

Definition at line 78 of file PostRASchedulerList.cpp.

cl::opt<bool> EnableAntiDepBreaking("break-anti-dependencies", cl::desc("Break post-RA scheduling anti-dependencies"), cl::init(true), cl::Hidden) [static]

cl::opt<bool> EnablePostRAHazardAvoidance("avoid-hazards", cl::desc("Enable simple hazard-avoidance"), cl::init(true), cl::Hidden) [static]

ScheduleHazardRecognizer* HazardRec

HazardRec - The hazard recognizer to use.

Definition at line 95 of file PostRASchedulerList.cpp.

char ID [static]

Definition at line 56 of file PostRASchedulerList.cpp.

std::vector<SUnit*> PendingQueue

PendingQueue - This contains all of the instructions whose operands have been issued, but their results are not ready yet (due to the latency of the operation). Once the operands becomes available, the instruction is added to the AvailableQueue.

Definition at line 84 of file PostRASchedulerList.cpp.

ScheduleDAGTopologicalSort Topo

Topo - A topological ordering for SUnits.

Definition at line 87 of file PostRASchedulerList.cpp.

Class Window[8]

Window - The Class values of the most recently issued instructions.

Definition at line 130 of file PostRASchedulerList.cpp.