LLVM API Documentation
#include "llvm/CodeGen/ScheduleDAGSDNodes.h"#include "llvm/CodeGen/MachineConstantPool.h"#include "llvm/CodeGen/MachineFunction.h"#include "llvm/CodeGen/MachineInstrBuilder.h"#include "llvm/CodeGen/MachineRegisterInfo.h"#include "llvm/Target/TargetData.h"#include "llvm/Target/TargetMachine.h"#include "llvm/Target/TargetInstrInfo.h"#include "llvm/Target/TargetLowering.h"#include "llvm/ADT/Statistic.h"#include "llvm/Support/CommandLine.h"#include "llvm/Support/Debug.h"#include "llvm/Support/MathExtras.h"
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Defines | |
| #define | DEBUG_TYPE "pre-RA-sched" |
Functions | |
| static const TargetRegisterClass * | getInstrOperandRegClass (const TargetRegisterInfo *TRI, const TargetInstrInfo *TII, const TargetInstrDesc &II, unsigned Op) |
| #define DEBUG_TYPE "pre-RA-sched" |
Definition at line 15 of file ScheduleDAGSDNodesEmit.cpp.
| static const TargetRegisterClass* getInstrOperandRegClass | ( | const TargetRegisterInfo * | TRI, | |
| const TargetInstrInfo * | TII, | |||
| const TargetInstrDesc & | II, | |||
| unsigned | Op | |||
| ) | [static] |
getInstrOperandRegClass - Return register class of the operand of an instruction of the specified TargetInstrDesc.
Definition at line 34 of file ScheduleDAGSDNodesEmit.cpp.
References llvm::TargetInstrDesc::getNumOperands(), llvm::TargetInstrInfo::getPointerRegClass(), llvm::TargetRegisterInfo::getRegClass(), llvm::TargetOperandInfo::isLookupPtrRegClass(), llvm::TargetInstrDesc::isVariadic(), llvm::TargetInstrDesc::OpInfo, and llvm::TargetOperandInfo::RegClass.