LLVM API Documentation
00001 //===-- llvm/CodeGen/VirtRegMap.h - Virtual Register Map -*- C++ -*--------===// 00002 // 00003 // The LLVM Compiler Infrastructure 00004 // 00005 // This file is distributed under the University of Illinois Open Source 00006 // License. See LICENSE.TXT for details. 00007 // 00008 //===----------------------------------------------------------------------===// 00009 // 00010 // This file implements a virtual register map. This maps virtual registers to 00011 // physical registers and virtual registers to stack slots. It is created and 00012 // updated by a register allocator and then used by a machine code rewriter that 00013 // adds spill code and rewrites virtual into physical register references. 00014 // 00015 //===----------------------------------------------------------------------===// 00016 00017 #ifndef LLVM_CODEGEN_VIRTREGMAP_H 00018 #define LLVM_CODEGEN_VIRTREGMAP_H 00019 00020 #include "llvm/Target/TargetRegisterInfo.h" 00021 #include "llvm/ADT/BitVector.h" 00022 #include "llvm/ADT/IndexedMap.h" 00023 #include "llvm/ADT/SmallPtrSet.h" 00024 #include "llvm/ADT/SmallVector.h" 00025 #include "llvm/Support/Streams.h" 00026 #include <map> 00027 00028 namespace llvm { 00029 class MachineInstr; 00030 class MachineFunction; 00031 class TargetInstrInfo; 00032 00033 class VirtRegMap { 00034 public: 00035 enum { 00036 NO_PHYS_REG = 0, 00037 NO_STACK_SLOT = (1L << 30)-1, 00038 MAX_STACK_SLOT = (1L << 18)-1 00039 }; 00040 00041 enum ModRef { isRef = 1, isMod = 2, isModRef = 3 }; 00042 typedef std::multimap<MachineInstr*, 00043 std::pair<unsigned, ModRef> > MI2VirtMapTy; 00044 00045 private: 00046 const TargetInstrInfo &TII; 00047 00048 MachineFunction &MF; 00049 /// Virt2PhysMap - This is a virtual to physical register 00050 /// mapping. Each virtual register is required to have an entry in 00051 /// it; even spilled virtual registers (the register mapped to a 00052 /// spilled register is the temporary used to load it from the 00053 /// stack). 00054 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2PhysMap; 00055 00056 /// Virt2StackSlotMap - This is virtual register to stack slot 00057 /// mapping. Each spilled virtual register has an entry in it 00058 /// which corresponds to the stack slot this register is spilled 00059 /// at. 00060 IndexedMap<int, VirtReg2IndexFunctor> Virt2StackSlotMap; 00061 00062 /// Virt2ReMatIdMap - This is virtual register to rematerialization id 00063 /// mapping. Each spilled virtual register that should be remat'd has an 00064 /// entry in it which corresponds to the remat id. 00065 IndexedMap<int, VirtReg2IndexFunctor> Virt2ReMatIdMap; 00066 00067 /// Virt2SplitMap - This is virtual register to splitted virtual register 00068 /// mapping. 00069 IndexedMap<unsigned, VirtReg2IndexFunctor> Virt2SplitMap; 00070 00071 /// Virt2SplitKillMap - This is splitted virtual register to its last use 00072 /// (kill) index mapping. 00073 IndexedMap<unsigned> Virt2SplitKillMap; 00074 00075 /// ReMatMap - This is virtual register to re-materialized instruction 00076 /// mapping. Each virtual register whose definition is going to be 00077 /// re-materialized has an entry in it. 00078 IndexedMap<MachineInstr*, VirtReg2IndexFunctor> ReMatMap; 00079 00080 /// MI2VirtMap - This is MachineInstr to virtual register 00081 /// mapping. In the case of memory spill code being folded into 00082 /// instructions, we need to know which virtual register was 00083 /// read/written by this instruction. 00084 MI2VirtMapTy MI2VirtMap; 00085 00086 /// SpillPt2VirtMap - This records the virtual registers which should 00087 /// be spilled right after the MachineInstr due to live interval 00088 /// splitting. 00089 std::map<MachineInstr*, std::vector<std::pair<unsigned,bool> > > 00090 SpillPt2VirtMap; 00091 00092 /// RestorePt2VirtMap - This records the virtual registers which should 00093 /// be restored right before the MachineInstr due to live interval 00094 /// splitting. 00095 std::map<MachineInstr*, std::vector<unsigned> > RestorePt2VirtMap; 00096 00097 /// EmergencySpillMap - This records the physical registers that should 00098 /// be spilled / restored around the MachineInstr since the register 00099 /// allocator has run out of registers. 00100 std::map<MachineInstr*, std::vector<unsigned> > EmergencySpillMap; 00101 00102 /// EmergencySpillSlots - This records emergency spill slots used to 00103 /// spill physical registers when the register allocator runs out of 00104 /// registers. Ideally only one stack slot is used per function per 00105 /// register class. 00106 std::map<const TargetRegisterClass*, int> EmergencySpillSlots; 00107 00108 /// ReMatId - Instead of assigning a stack slot to a to be rematerialized 00109 /// virtual register, an unique id is being assigned. This keeps track of 00110 /// the highest id used so far. Note, this starts at (1<<18) to avoid 00111 /// conflicts with stack slot numbers. 00112 int ReMatId; 00113 00114 /// LowSpillSlot, HighSpillSlot - Lowest and highest spill slot indexes. 00115 int LowSpillSlot, HighSpillSlot; 00116 00117 /// SpillSlotToUsesMap - Records uses for each register spill slot. 00118 SmallVector<SmallPtrSet<MachineInstr*, 4>, 8> SpillSlotToUsesMap; 00119 00120 /// ImplicitDefed - One bit for each virtual register. If set it indicates 00121 /// the register is implicitly defined. 00122 BitVector ImplicitDefed; 00123 00124 VirtRegMap(const VirtRegMap&); // DO NOT IMPLEMENT 00125 void operator=(const VirtRegMap&); // DO NOT IMPLEMENT 00126 00127 public: 00128 explicit VirtRegMap(MachineFunction &mf); 00129 00130 void grow(); 00131 00132 /// @brief returns true if the specified virtual register is 00133 /// mapped to a physical register 00134 bool hasPhys(unsigned virtReg) const { 00135 return getPhys(virtReg) != NO_PHYS_REG; 00136 } 00137 00138 /// @brief returns the physical register mapped to the specified 00139 /// virtual register 00140 unsigned getPhys(unsigned virtReg) const { 00141 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 00142 return Virt2PhysMap[virtReg]; 00143 } 00144 00145 /// @brief creates a mapping for the specified virtual register to 00146 /// the specified physical register 00147 void assignVirt2Phys(unsigned virtReg, unsigned physReg) { 00148 assert(TargetRegisterInfo::isVirtualRegister(virtReg) && 00149 TargetRegisterInfo::isPhysicalRegister(physReg)); 00150 assert(Virt2PhysMap[virtReg] == NO_PHYS_REG && 00151 "attempt to assign physical register to already mapped " 00152 "virtual register"); 00153 Virt2PhysMap[virtReg] = physReg; 00154 } 00155 00156 /// @brief clears the specified virtual register's, physical 00157 /// register mapping 00158 void clearVirt(unsigned virtReg) { 00159 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 00160 assert(Virt2PhysMap[virtReg] != NO_PHYS_REG && 00161 "attempt to clear a not assigned virtual register"); 00162 Virt2PhysMap[virtReg] = NO_PHYS_REG; 00163 } 00164 00165 /// @brief clears all virtual to physical register mappings 00166 void clearAllVirt() { 00167 Virt2PhysMap.clear(); 00168 grow(); 00169 } 00170 00171 /// @brief records virtReg is a split live interval from SReg. 00172 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { 00173 Virt2SplitMap[virtReg] = SReg; 00174 } 00175 00176 /// @brief returns the live interval virtReg is split from. 00177 unsigned getPreSplitReg(unsigned virtReg) { 00178 return Virt2SplitMap[virtReg]; 00179 } 00180 00181 /// @brief returns true if the specified virtual register is not 00182 /// mapped to a stack slot or rematerialized. 00183 bool isAssignedReg(unsigned virtReg) const { 00184 if (getStackSlot(virtReg) == NO_STACK_SLOT && 00185 getReMatId(virtReg) == NO_STACK_SLOT) 00186 return true; 00187 // Split register can be assigned a physical register as well as a 00188 // stack slot or remat id. 00189 return (Virt2SplitMap[virtReg] && Virt2PhysMap[virtReg] != NO_PHYS_REG); 00190 } 00191 00192 /// @brief returns the stack slot mapped to the specified virtual 00193 /// register 00194 int getStackSlot(unsigned virtReg) const { 00195 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 00196 return Virt2StackSlotMap[virtReg]; 00197 } 00198 00199 /// @brief returns the rematerialization id mapped to the specified virtual 00200 /// register 00201 int getReMatId(unsigned virtReg) const { 00202 assert(TargetRegisterInfo::isVirtualRegister(virtReg)); 00203 return Virt2ReMatIdMap[virtReg]; 00204 } 00205 00206 /// @brief create a mapping for the specifed virtual register to 00207 /// the next available stack slot 00208 int assignVirt2StackSlot(unsigned virtReg); 00209 /// @brief create a mapping for the specified virtual register to 00210 /// the specified stack slot 00211 void assignVirt2StackSlot(unsigned virtReg, int frameIndex); 00212 00213 /// @brief assign an unique re-materialization id to the specified 00214 /// virtual register. 00215 int assignVirtReMatId(unsigned virtReg); 00216 /// @brief assign an unique re-materialization id to the specified 00217 /// virtual register. 00218 void assignVirtReMatId(unsigned virtReg, int id); 00219 00220 /// @brief returns true if the specified virtual register is being 00221 /// re-materialized. 00222 bool isReMaterialized(unsigned virtReg) const { 00223 return ReMatMap[virtReg] != NULL; 00224 } 00225 00226 /// @brief returns the original machine instruction being re-issued 00227 /// to re-materialize the specified virtual register. 00228 MachineInstr *getReMaterializedMI(unsigned virtReg) const { 00229 return ReMatMap[virtReg]; 00230 } 00231 00232 /// @brief records the specified virtual register will be 00233 /// re-materialized and the original instruction which will be re-issed 00234 /// for this purpose. If parameter all is true, then all uses of the 00235 /// registers are rematerialized and it's safe to delete the definition. 00236 void setVirtIsReMaterialized(unsigned virtReg, MachineInstr *def) { 00237 ReMatMap[virtReg] = def; 00238 } 00239 00240 /// @brief record the last use (kill) of a split virtual register. 00241 void addKillPoint(unsigned virtReg, unsigned index) { 00242 Virt2SplitKillMap[virtReg] = index; 00243 } 00244 00245 unsigned getKillPoint(unsigned virtReg) const { 00246 return Virt2SplitKillMap[virtReg]; 00247 } 00248 00249 /// @brief remove the last use (kill) of a split virtual register. 00250 void removeKillPoint(unsigned virtReg) { 00251 Virt2SplitKillMap[virtReg] = 0; 00252 } 00253 00254 /// @brief returns true if the specified MachineInstr is a spill point. 00255 bool isSpillPt(MachineInstr *Pt) const { 00256 return SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end(); 00257 } 00258 00259 /// @brief returns the virtual registers that should be spilled due to 00260 /// splitting right after the specified MachineInstr. 00261 std::vector<std::pair<unsigned,bool> > &getSpillPtSpills(MachineInstr *Pt) { 00262 return SpillPt2VirtMap[Pt]; 00263 } 00264 00265 /// @brief records the specified MachineInstr as a spill point for virtReg. 00266 void addSpillPoint(unsigned virtReg, bool isKill, MachineInstr *Pt) { 00267 if (SpillPt2VirtMap.find(Pt) != SpillPt2VirtMap.end()) 00268 SpillPt2VirtMap[Pt].push_back(std::make_pair(virtReg, isKill)); 00269 else { 00270 std::vector<std::pair<unsigned,bool> > Virts; 00271 Virts.push_back(std::make_pair(virtReg, isKill)); 00272 SpillPt2VirtMap.insert(std::make_pair(Pt, Virts)); 00273 } 00274 } 00275 00276 /// @brief - transfer spill point information from one instruction to 00277 /// another. 00278 void transferSpillPts(MachineInstr *Old, MachineInstr *New) { 00279 std::map<MachineInstr*,std::vector<std::pair<unsigned,bool> > >::iterator 00280 I = SpillPt2VirtMap.find(Old); 00281 if (I == SpillPt2VirtMap.end()) 00282 return; 00283 while (!I->second.empty()) { 00284 unsigned virtReg = I->second.back().first; 00285 bool isKill = I->second.back().second; 00286 I->second.pop_back(); 00287 addSpillPoint(virtReg, isKill, New); 00288 } 00289 SpillPt2VirtMap.erase(I); 00290 } 00291 00292 /// @brief returns true if the specified MachineInstr is a restore point. 00293 bool isRestorePt(MachineInstr *Pt) const { 00294 return RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end(); 00295 } 00296 00297 /// @brief returns the virtual registers that should be restoreed due to 00298 /// splitting right after the specified MachineInstr. 00299 std::vector<unsigned> &getRestorePtRestores(MachineInstr *Pt) { 00300 return RestorePt2VirtMap[Pt]; 00301 } 00302 00303 /// @brief records the specified MachineInstr as a restore point for virtReg. 00304 void addRestorePoint(unsigned virtReg, MachineInstr *Pt) { 00305 if (RestorePt2VirtMap.find(Pt) != RestorePt2VirtMap.end()) 00306 RestorePt2VirtMap[Pt].push_back(virtReg); 00307 else { 00308 std::vector<unsigned> Virts; 00309 Virts.push_back(virtReg); 00310 RestorePt2VirtMap.insert(std::make_pair(Pt, Virts)); 00311 } 00312 } 00313 00314 /// @brief - transfer restore point information from one instruction to 00315 /// another. 00316 void transferRestorePts(MachineInstr *Old, MachineInstr *New) { 00317 std::map<MachineInstr*,std::vector<unsigned> >::iterator I = 00318 RestorePt2VirtMap.find(Old); 00319 if (I == RestorePt2VirtMap.end()) 00320 return; 00321 while (!I->second.empty()) { 00322 unsigned virtReg = I->second.back(); 00323 I->second.pop_back(); 00324 addRestorePoint(virtReg, New); 00325 } 00326 RestorePt2VirtMap.erase(I); 00327 } 00328 00329 /// @brief records that the specified physical register must be spilled 00330 /// around the specified machine instr. 00331 void addEmergencySpill(unsigned PhysReg, MachineInstr *MI) { 00332 if (EmergencySpillMap.find(MI) != EmergencySpillMap.end()) 00333 EmergencySpillMap[MI].push_back(PhysReg); 00334 else { 00335 std::vector<unsigned> PhysRegs; 00336 PhysRegs.push_back(PhysReg); 00337 EmergencySpillMap.insert(std::make_pair(MI, PhysRegs)); 00338 } 00339 } 00340 00341 /// @brief returns true if one or more physical registers must be spilled 00342 /// around the specified instruction. 00343 bool hasEmergencySpills(MachineInstr *MI) const { 00344 return EmergencySpillMap.find(MI) != EmergencySpillMap.end(); 00345 } 00346 00347 /// @brief returns the physical registers to be spilled and restored around 00348 /// the instruction. 00349 std::vector<unsigned> &getEmergencySpills(MachineInstr *MI) { 00350 return EmergencySpillMap[MI]; 00351 } 00352 00353 /// @brief - transfer emergency spill information from one instruction to 00354 /// another. 00355 void transferEmergencySpills(MachineInstr *Old, MachineInstr *New) { 00356 std::map<MachineInstr*,std::vector<unsigned> >::iterator I = 00357 EmergencySpillMap.find(Old); 00358 if (I == EmergencySpillMap.end()) 00359 return; 00360 while (!I->second.empty()) { 00361 unsigned virtReg = I->second.back(); 00362 I->second.pop_back(); 00363 addEmergencySpill(virtReg, New); 00364 } 00365 EmergencySpillMap.erase(I); 00366 } 00367 00368 /// @brief return or get a emergency spill slot for the register class. 00369 int getEmergencySpillSlot(const TargetRegisterClass *RC); 00370 00371 /// @brief Return lowest spill slot index. 00372 int getLowSpillSlot() const { 00373 return LowSpillSlot; 00374 } 00375 00376 /// @brief Return highest spill slot index. 00377 int getHighSpillSlot() const { 00378 return HighSpillSlot; 00379 } 00380 00381 /// @brief Records a spill slot use. 00382 void addSpillSlotUse(int FrameIndex, MachineInstr *MI); 00383 00384 /// @brief Returns true if spill slot has been used. 00385 bool isSpillSlotUsed(int FrameIndex) const { 00386 assert(FrameIndex >= 0 && "Spill slot index should not be negative!"); 00387 return !SpillSlotToUsesMap[FrameIndex-LowSpillSlot].empty(); 00388 } 00389 00390 /// @brief Mark the specified register as being implicitly defined. 00391 void setIsImplicitlyDefined(unsigned VirtReg) { 00392 ImplicitDefed.set(VirtReg-TargetRegisterInfo::FirstVirtualRegister); 00393 } 00394 00395 /// @brief Returns true if the virtual register is implicitly defined. 00396 bool isImplicitlyDefined(unsigned VirtReg) const { 00397 return ImplicitDefed[VirtReg-TargetRegisterInfo::FirstVirtualRegister]; 00398 } 00399 00400 /// @brief Updates information about the specified virtual register's value 00401 /// folded into newMI machine instruction. 00402 void virtFolded(unsigned VirtReg, MachineInstr *OldMI, MachineInstr *NewMI, 00403 ModRef MRInfo); 00404 00405 /// @brief Updates information about the specified virtual register's value 00406 /// folded into the specified machine instruction. 00407 void virtFolded(unsigned VirtReg, MachineInstr *MI, ModRef MRInfo); 00408 00409 /// @brief returns the virtual registers' values folded in memory 00410 /// operands of this instruction 00411 std::pair<MI2VirtMapTy::const_iterator, MI2VirtMapTy::const_iterator> 00412 getFoldedVirts(MachineInstr* MI) const { 00413 return MI2VirtMap.equal_range(MI); 00414 } 00415 00416 /// RemoveMachineInstrFromMaps - MI is being erased, remove it from the 00417 /// the folded instruction map and spill point map. 00418 void RemoveMachineInstrFromMaps(MachineInstr *MI); 00419 00420 void print(std::ostream &OS) const; 00421 void print(std::ostream *OS) const { if (OS) print(*OS); } 00422 void dump() const; 00423 }; 00424 00425 inline std::ostream *operator<<(std::ostream *OS, const VirtRegMap &VRM) { 00426 VRM.print(OS); 00427 return OS; 00428 } 00429 inline std::ostream &operator<<(std::ostream &OS, const VirtRegMap &VRM) { 00430 VRM.print(OS); 00431 return OS; 00432 } 00433 00434 /// Spiller interface: Implementations of this interface assign spilled 00435 /// virtual registers to stack slots, rewriting the code. 00436 struct Spiller { 00437 virtual ~Spiller(); 00438 virtual bool runOnMachineFunction(MachineFunction &MF, 00439 VirtRegMap &VRM) = 0; 00440 }; 00441 00442 /// createSpiller - Create an return a spiller object, as specified on the 00443 /// command line. 00444 Spiller* createSpiller(); 00445 00446 } // End llvm namespace 00447 00448 #endif