LLVM API Documentation

X86InstrInfo.cpp File Reference

#include "X86InstrInfo.h"
#include "X86.h"
#include "X86GenInstrInfo.inc"
#include "X86InstrBuilder.h"
#include "X86MachineFunctionInfo.h"
#include "X86Subtarget.h"
#include "X86TargetMachine.h"
#include "llvm/DerivedTypes.h"
#include "llvm/ADT/STLExtras.h"
#include "llvm/CodeGen/MachineConstantPool.h"
#include "llvm/CodeGen/MachineFrameInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
#include "llvm/CodeGen/LiveVariables.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetAsmInfo.h"

Include dependency graph for X86InstrInfo.cpp:

Go to the source code of this file.

Functions

static bool regIsPICBase (unsigned BaseReg, const MachineRegisterInfo &MRI)
static bool isGVStub (GlobalValue *GV, X86TargetMachine &TM)
static bool isSafeToClobberEFLAGS (MachineBasicBlock &MBB, MachineBasicBlock::iterator I)
static bool hasLiveCondCodeDef (MachineInstr *MI)
static X86::CondCode GetCondFromBranchOpc (unsigned BrOpc)
static bool isBrAnalysisUnpredicatedTerminator (const MachineInstr *MI, const X86InstrInfo &TII)
static const MachineInstrBuilder & X86InstrAddOperand (MachineInstrBuilder &MIB, const MachineOperand &MO)
static unsigned getStoreRegOpcode (const TargetRegisterClass *RC, bool isStackAligned)
static unsigned getLoadRegOpcode (const TargetRegisterClass *RC, bool isStackAligned)
static MachineInstr * FuseTwoAddrInst (MachineFunction &MF, unsigned Opcode, const SmallVectorImpl< MachineOperand > &MOs, MachineInstr *MI, const TargetInstrInfo &TII)
static MachineInstr * FuseInst (MachineFunction &MF, unsigned Opcode, unsigned OpNo, const SmallVectorImpl< MachineOperand > &MOs, MachineInstr *MI, const TargetInstrInfo &TII)
static MachineInstr * MakeM0Inst (const TargetInstrInfo &TII, unsigned Opcode, const SmallVectorImpl< MachineOperand > &MOs, MachineInstr *MI)
static unsigned sizePCRelativeBlockAddress ()
static unsigned sizeGlobalAddress (bool dword)
static unsigned sizeConstPoolAddress (bool dword)
static unsigned sizeExternalSymbolAddress (bool dword)
static unsigned sizeJumpTableAddress (bool dword)
static unsigned sizeConstant (unsigned Size)
static unsigned sizeRegModRMByte ()
static unsigned sizeSIBByte ()
static unsigned getDisplacementFieldSize (const MachineOperand *RelocOp)
static unsigned getMemModRMByteSize (const MachineInstr &MI, unsigned Op, bool IsPIC, bool Is64BitMode)
static unsigned GetInstSizeWithDesc (const MachineInstr &MI, const TargetInstrDesc *Desc, bool IsPIC, bool Is64BitMode)

Variables

cl::opt< bool > NoFusing ("disable-spill-fusing", cl::desc("Disable fusing of spill code into instructions"))
cl::opt< bool > PrintFailedFusing ("print-failed-fuse-candidates", cl::desc("Print instructions that the allocator wants to"" fuse, but the X86 backend currently can't"), cl::Hidden)
cl::opt< bool > ReMatPICStubLoad ("remat-pic-stub-load", cl::desc("Re-materialize load from stub in PIC mode"), cl::init(false), cl::Hidden)


Function Documentation

static MachineInstr* FuseInst ( MachineFunction &  MF,
unsigned  Opcode,
unsigned  OpNo,
const SmallVectorImpl< MachineOperand > &  MOs,
MachineInstr *  MI,
const TargetInstrInfo &  TII 
) [static]

static MachineInstr* FuseTwoAddrInst ( MachineFunction &  MF,
unsigned  Opcode,
const SmallVectorImpl< MachineOperand > &  MOs,
MachineInstr *  MI,
const TargetInstrInfo &  TII 
) [static]

static X86::CondCode GetCondFromBranchOpc ( unsigned  BrOpc  )  [static]

static unsigned getDisplacementFieldSize ( const MachineOperand *  RelocOp  )  [static]

static unsigned GetInstSizeWithDesc ( const MachineInstr &  MI,
const TargetInstrDesc *  Desc,
bool  IsPIC,
bool  Is64BitMode 
) [static]

Definition at line 2776 of file X86InstrInfo.cpp.

References llvm::X86II::AddRegFrm, llvm::X86II::AdSize, AI, llvm::cerr(), llvm::X86II::D8, llvm::X86II::D9, llvm::X86II::DA, llvm::X86II::DB, llvm::TargetInstrInfo::DBG_LABEL, llvm::X86II::DC, llvm::X86II::DD, llvm::X86II::DE, llvm::TargetInstrInfo::DECLARE, llvm::X86InstrInfo::determineREX(), llvm::X86II::DF, llvm::MachineInstr::dump(), llvm::TargetInstrInfo::EH_LABEL, llvm::X86II::FormMask, llvm::X86II::FS, llvm::TargetAsmInfo::getInlineAsmLength(), getMemModRMByteSize(), llvm::TargetInstrDesc::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::TargetInstrDesc::getOperandConstraint(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getSymbolName(), llvm::MachineFunction::getTarget(), llvm::TargetMachine::getTargetAsmInfo(), llvm::X86II::GS, llvm::TargetInstrInfo::IMPLICIT_DEF, llvm::TargetInstrInfo::INLINEASM, llvm::MachineOperand::isCPI(), llvm::MachineOperand::isGlobal(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isJTI(), llvm::MachineOperand::isMBB(), llvm::MachineOperand::isSymbol(), llvm::TargetInstrDesc::isVariadic(), llvm::X86II::LOCK, llvm::X86II::MRM0m, llvm::X86II::MRM0r, llvm::X86II::MRM1m, llvm::X86II::MRM1r, llvm::X86II::MRM2m, llvm::X86II::MRM2r, llvm::X86II::MRM3m, llvm::X86II::MRM3r, llvm::X86II::MRM4m, llvm::X86II::MRM4r, llvm::X86II::MRM5m, llvm::X86II::MRM5r, llvm::X86II::MRM6m, llvm::X86II::MRM6r, llvm::X86II::MRM7m, llvm::X86II::MRM7r, llvm::X86II::MRMDestMem, llvm::X86II::MRMDestReg, llvm::X86II::MRMInitReg, llvm::X86II::MRMSrcMem, llvm::X86II::MRMSrcReg, llvm::X86II::Op0Mask, llvm::TargetInstrDesc::Opcode, llvm::X86II::OpSize, llvm::X86II::Pseudo, llvm::X86II::RawFrm, llvm::X86II::REP, llvm::X86II::SegOvrMask, sizeConstant(), sizeConstPoolAddress(), sizeExternalSymbolAddress(), sizeGlobalAddress(), sizeJumpTableAddress(), llvm::X86InstrInfo::sizeOfImm(), sizePCRelativeBlockAddress(), sizeRegModRMByte(), llvm::X86II::T8, llvm::X86II::TA, llvm::X86II::TB, llvm::TOI::TIED_TO, llvm::TargetInstrDesc::TSFlags, llvm::X86II::XD, and llvm::X86II::XS.

Referenced by llvm::X86InstrInfo::GetInstSizeInBytes().

static unsigned getLoadRegOpcode ( const TargetRegisterClass *  RC,
bool  isStackAligned 
) [static]

static unsigned getMemModRMByteSize ( const MachineInstr &  MI,
unsigned  Op,
bool  IsPIC,
bool  Is64BitMode 
) [static]

static unsigned getStoreRegOpcode ( const TargetRegisterClass *  RC,
bool  isStackAligned 
) [static]

static bool hasLiveCondCodeDef ( MachineInstr *  MI  )  [static]

hasLiveCondCodeDef - True if MI has a condition code def, e.g. EFLAGS, that is not marked dead.

Definition at line 992 of file X86InstrInfo.cpp.

References llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isDef(), and llvm::MachineOperand::isReg().

Referenced by llvm::X86InstrInfo::convertToThreeAddress().

static bool isBrAnalysisUnpredicatedTerminator ( const MachineInstr *  MI,
const X86InstrInfo &  TII 
) [static]

static bool isGVStub ( GlobalValue *  GV,
X86TargetMachine &  TM 
) [inline, static]

isGVStub - Return true if the GV requires an extra load to get the real address.

Definition at line 789 of file X86InstrInfo.cpp.

References llvm::TargetMachine::getSubtarget().

Referenced by llvm::X86InstrInfo::isInvariantLoad(), and llvm::X86InstrInfo::isReallyTriviallyReMaterializable().

static bool isSafeToClobberEFLAGS ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  I 
) [static]

isSafeToClobberEFLAGS - Return true if it's safe insert an instruction that would clobber the EFLAGS condition register. Note the result may be conservative. If it cannot definitely determine the safety after visiting two instructions it assumes it's not safe.

Definition at line 869 of file X86InstrInfo.cpp.

References llvm::MachineBasicBlock::end(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and llvm::MachineOperand::isUse().

Referenced by llvm::X86InstrInfo::reMaterialize().

static MachineInstr* MakeM0Inst ( const TargetInstrInfo &  TII,
unsigned  Opcode,
const SmallVectorImpl< MachineOperand > &  MOs,
MachineInstr *  MI 
) [static]

static bool regIsPICBase ( unsigned  BaseReg,
const MachineRegisterInfo &  MRI 
) [static]

regIsPICBase - Return true if register is PIC base (i.e.g defined by X86::MOVPC32r.

Definition at line 774 of file X86InstrInfo.cpp.

References llvm::MachineRegisterInfo::def_begin(), llvm::MachineRegisterInfo::def_end(), E, and llvm::MachineInstr::getOpcode().

Referenced by llvm::X86InstrInfo::isReallyTriviallyReMaterializable().

static unsigned sizeConstant ( unsigned  Size  )  [static]

Definition at line 2668 of file X86InstrInfo.cpp.

Referenced by getDisplacementFieldSize(), and GetInstSizeWithDesc().

static unsigned sizeConstPoolAddress ( bool  dword  )  [static]

sizeConstPoolAddress - Give the size of the emission of this constant pool address

Definition at line 2650 of file X86InstrInfo.cpp.

Referenced by getDisplacementFieldSize(), and GetInstSizeWithDesc().

static unsigned sizeExternalSymbolAddress ( bool  dword  )  [static]

sizeExternalSymbolAddress - Give the size of the emission of this external symbol

Definition at line 2657 of file X86InstrInfo.cpp.

Referenced by GetInstSizeWithDesc().

static unsigned sizeGlobalAddress ( bool  dword  )  [static]

sizeGlobalAddress - Give the size of the emission of this global address

Definition at line 2643 of file X86InstrInfo.cpp.

Referenced by getDisplacementFieldSize(), and GetInstSizeWithDesc().

static unsigned sizeJumpTableAddress ( bool  dword  )  [static]

sizeJumpTableAddress - Give the size of the emission of this jump table address

Definition at line 2664 of file X86InstrInfo.cpp.

Referenced by getDisplacementFieldSize(), and GetInstSizeWithDesc().

static unsigned sizePCRelativeBlockAddress (  )  [static]

sizePCRelativeBlockAddress - This method returns the size of a PC relative block address instruction

Definition at line 2637 of file X86InstrInfo.cpp.

Referenced by GetInstSizeWithDesc().

static unsigned sizeRegModRMByte (  )  [static]

Definition at line 2672 of file X86InstrInfo.cpp.

Referenced by GetInstSizeWithDesc().

static unsigned sizeSIBByte (  )  [static]

Definition at line 2676 of file X86InstrInfo.cpp.

Referenced by getMemModRMByteSize().

static const MachineInstrBuilder& X86InstrAddOperand ( MachineInstrBuilder &  MIB,
const MachineOperand &  MO 
) [static]


Variable Documentation

cl::opt<bool> NoFusing("disable-spill-fusing", cl::desc("Disable fusing of spill code into instructions")) [static]

cl::opt<bool> PrintFailedFusing("print-failed-fuse-candidates", cl::desc("Print instructions that the allocator wants to"" fuse, but the X86 backend currently can't"), cl::Hidden) [static]

cl::opt<bool> ReMatPICStubLoad("remat-pic-stub-load", cl::desc("Re-materialize load from stub in PIC mode"), cl::init(false), cl::Hidden) [static]