LLVM API Documentation

XCoreRegisterInfo.h

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00001 //===- XCoreRegisterInfo.h - XCore Register Information Impl ----*- C++ -*-===//
00002 //
00003 //                     The LLVM Compiler Infrastructure
00004 //
00005 // This file is distributed under the University of Illinois Open Source
00006 // License. See LICENSE.TXT for details.
00007 //
00008 //===----------------------------------------------------------------------===//
00009 //
00010 // This file contains the XCore implementation of the MRegisterInfo class.
00011 //
00012 //===----------------------------------------------------------------------===//
00013 
00014 #ifndef XCOREREGISTERINFO_H
00015 #define XCOREREGISTERINFO_H
00016 
00017 #include "llvm/Target/TargetRegisterInfo.h"
00018 #include "XCoreGenRegisterInfo.h.inc"
00019 
00020 namespace llvm {
00021 
00022 class TargetInstrInfo;
00023 
00024 struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
00025 private:
00026   const TargetInstrInfo &TII;
00027 
00028   void loadConstant(MachineBasicBlock &MBB,
00029                   MachineBasicBlock::iterator I,
00030                   unsigned DstReg, int64_t Value) const;
00031 
00032   void storeToStack(MachineBasicBlock &MBB,
00033                   MachineBasicBlock::iterator I,
00034                   unsigned SrcReg, int Offset) const;
00035 
00036   void loadFromStack(MachineBasicBlock &MBB,
00037                   MachineBasicBlock::iterator I,
00038                   unsigned DstReg, int Offset) const;
00039 
00040 public:
00041   XCoreRegisterInfo(const TargetInstrInfo &tii);
00042 
00043   /// Code Generation virtual methods...
00044 
00045   const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
00046 
00047   const TargetRegisterClass* const* getCalleeSavedRegClasses(
00048                                      const MachineFunction *MF = 0) const;
00049 
00050   BitVector getReservedRegs(const MachineFunction &MF) const;
00051   
00052   bool requiresRegisterScavenging(const MachineFunction &MF) const;
00053 
00054   bool hasFP(const MachineFunction &MF) const;
00055 
00056   void eliminateCallFramePseudoInstr(MachineFunction &MF,
00057                                      MachineBasicBlock &MBB,
00058                                      MachineBasicBlock::iterator I) const;
00059 
00060   void eliminateFrameIndex(MachineBasicBlock::iterator II,
00061                            int SPAdj, RegScavenger *RS = NULL) const;
00062                            
00063   void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
00064                                                 RegScavenger *RS = NULL) const;
00065 
00066   void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
00067 
00068   void emitPrologue(MachineFunction &MF) const;
00069   void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
00070   
00071   // Debug information queries.
00072   unsigned getRARegister() const;
00073   unsigned getFrameRegister(MachineFunction &MF) const;
00074   void getInitialFrameState(std::vector<MachineMove> &Moves) const;
00075 
00076   //! Return the array of argument passing registers
00077   /*!
00078     \note The size of this array is returned by getArgRegsSize().
00079     */
00080   static const unsigned *getArgRegs(const MachineFunction *MF = 0);
00081 
00082   //! Return the size of the argument passing register array
00083   static unsigned getNumArgRegs(const MachineFunction *MF = 0);
00084   
00085   //! Return whether to emit frame moves
00086   static bool needsFrameMoves(const MachineFunction &MF);
00087 
00088   //! Get DWARF debugging register number
00089   int getDwarfRegNum(unsigned RegNum, bool isEH) const;
00090 };
00091 
00092 } // end namespace llvm
00093 
00094 #endif