LLVM API Documentation
#include <MachineInstrBuilder.h>
Public Member Functions | |
| MachineInstrBuilder (MachineInstr *mi) | |
| operator MachineInstr * () const | |
| operator MachineBasicBlock::iterator () const | |
| const MachineInstrBuilder & | addReg (unsigned RegNo, bool isDef=false, bool isImp=false, bool isKill=false, bool isDead=false, unsigned SubReg=0) const |
| const MachineInstrBuilder & | addImm (int64_t Val) const |
| const MachineInstrBuilder & | addFPImm (const ConstantFP *Val) const |
| const MachineInstrBuilder & | addMBB (MachineBasicBlock *MBB) const |
| const MachineInstrBuilder & | addFrameIndex (unsigned Idx) const |
| const MachineInstrBuilder & | addConstantPoolIndex (unsigned Idx, int Offset=0) const |
| const MachineInstrBuilder & | addJumpTableIndex (unsigned Idx) const |
| const MachineInstrBuilder & | addGlobalAddress (GlobalValue *GV, int64_t Offset=0) const |
| const MachineInstrBuilder & | addExternalSymbol (const char *FnName, int64_t Offset=0) const |
| const MachineInstrBuilder & | addMemOperand (const MachineMemOperand &MMO) const |
Definition at line 26 of file MachineInstrBuilder.h.
| llvm::MachineInstrBuilder::MachineInstrBuilder | ( | MachineInstr * | mi | ) | [inline, explicit] |
Definition at line 29 of file MachineInstrBuilder.h.
| llvm::MachineInstrBuilder::operator MachineInstr * | ( | ) | const [inline] |
Allow automatic conversion to the machine instruction we are working on.
Definition at line 33 of file MachineInstrBuilder.h.
| llvm::MachineInstrBuilder::operator MachineBasicBlock::iterator | ( | ) | const [inline] |
Definition at line 34 of file MachineInstrBuilder.h.
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addReg | ( | unsigned | RegNo, | |
| bool | isDef = false, |
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| bool | isImp = false, |
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| bool | isKill = false, |
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| bool | isDead = false, |
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| unsigned | SubReg = 0 | |||
| ) | const [inline] |
addReg - Add a new virtual register operand...
Definition at line 39 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateReg(), and MI.
Referenced by llvm::addConstantPoolReference(), AddDefaultCC(), AddDefaultPred(), llvm::addDirectMem(), llvm::addFrameReference(), llvm::addFullAddress(), llvm::addRegOffset(), llvm::addRegReg(), ARMInstrAddOperand(), llvm::TargetInstrInfoImpl::commuteInstruction(), llvm::PPCInstrInfo::commuteInstruction(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::ARMInstrInfo::convertToThreeAddress(), llvm::XCoreInstrInfo::copyRegToReg(), llvm::X86InstrInfo::copyRegToReg(), llvm::SPUInstrInfo::copyRegToReg(), llvm::SparcInstrInfo::copyRegToReg(), llvm::PPCInstrInfo::copyRegToReg(), llvm::PIC16InstrInfo::copyRegToReg(), llvm::MipsInstrInfo::copyRegToReg(), llvm::IA64InstrInfo::copyRegToReg(), llvm::AlphaInstrInfo::copyRegToReg(), llvm::PPCRegisterInfo::eliminateCallFramePseudoInstr(), llvm::AlphaRegisterInfo::eliminateCallFramePseudoInstr(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::SparcRegisterInfo::eliminateFrameIndex(), llvm::IA64RegisterInfo::eliminateFrameIndex(), emitARMRegPlusImmediate(), llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::SPURegisterInfo::emitEpilogue(), llvm::SparcRegisterInfo::emitEpilogue(), llvm::PPCRegisterInfo::emitEpilogue(), llvm::MipsRegisterInfo::emitEpilogue(), llvm::ARMRegisterInfo::emitEpilogue(), llvm::AlphaRegisterInfo::emitEpilogue(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::SparcTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::PIC16TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::AlphaTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMRegisterInfo::emitLoadConstPool(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::SPURegisterInfo::emitPrologue(), llvm::SparcRegisterInfo::emitPrologue(), llvm::PPCRegisterInfo::emitPrologue(), llvm::MipsRegisterInfo::emitPrologue(), llvm::IA64RegisterInfo::emitPrologue(), llvm::AlphaRegisterInfo::emitPrologue(), emitThumbRegPlusImmInReg(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::FastISel::FastEmitInst_r(), llvm::FastISel::FastEmitInst_rf(), llvm::FastISel::FastEmitInst_ri(), llvm::FastISel::FastEmitInst_rr(), llvm::FastISel::FastEmitInst_rri(), llvm::SPUInstrInfo::foldMemoryOperandImpl(), llvm::SparcInstrInfo::foldMemoryOperandImpl(), llvm::MipsInstrInfo::foldMemoryOperandImpl(), llvm::ARMInstrInfo::foldMemoryOperandImpl(), llvm::AlphaInstrInfo::foldMemoryOperandImpl(), FuseInst(), FuseTwoAddrInst(), llvm::XCoreInstrInfo::InsertBranch(), llvm::SPUInstrInfo::InsertBranch(), llvm::PPCInstrInfo::InsertBranch(), llvm::MipsInstrInfo::InsertBranch(), llvm::ARMInstrInfo::InsertBranch(), llvm::AlphaInstrInfo::InsertBranch(), llvm::AlphaInstrInfo::insertNoop(), llvm::SPUInstrInfo::loadRegFromAddr(), llvm::SparcInstrInfo::loadRegFromAddr(), llvm::PPCInstrInfo::loadRegFromAddr(), llvm::MipsInstrInfo::loadRegFromAddr(), llvm::IA64InstrInfo::loadRegFromAddr(), llvm::AlphaInstrInfo::loadRegFromAddr(), llvm::IA64InstrInfo::loadRegFromStackSlot(), llvm::AlphaInstrInfo::loadRegFromStackSlot(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), MakeM0Inst(), mergeBaseUpdateLoadStore(), mergeOps(), llvm::X86InstrInfo::spillCalleeSavedRegisters(), llvm::ARMInstrInfo::spillCalleeSavedRegisters(), llvm::X86InstrInfo::storeRegToAddr(), llvm::SPUInstrInfo::storeRegToAddr(), llvm::SparcInstrInfo::storeRegToAddr(), llvm::PPCInstrInfo::storeRegToAddr(), llvm::MipsInstrInfo::storeRegToAddr(), llvm::IA64InstrInfo::storeRegToAddr(), llvm::ARMInstrInfo::storeRegToAddr(), llvm::AlphaInstrInfo::storeRegToAddr(), llvm::XCoreInstrInfo::storeRegToStackSlot(), llvm::X86InstrInfo::storeRegToStackSlot(), llvm::SparcInstrInfo::storeRegToStackSlot(), llvm::PIC16InstrInfo::storeRegToStackSlot(), llvm::MipsInstrInfo::storeRegToStackSlot(), llvm::IA64InstrInfo::storeRegToStackSlot(), llvm::AlphaInstrInfo::storeRegToStackSlot(), llvm::X86InstrInfo::unfoldMemoryOperand(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addImm | ( | int64_t | Val | ) | const [inline] |
addImm - Add a new immediate operand.
Definition at line 49 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateImm(), and MI.
Referenced by llvm::addConstantPoolReference(), AddDefaultPred(), llvm::addDirectMem(), llvm::addFrameReference(), llvm::addFullAddress(), llvm::addRegOffset(), llvm::addRegReg(), ARMInstrAddOperand(), llvm::PPCInstrInfo::commuteInstruction(), llvm::X86InstrInfo::convertToThreeAddress(), llvm::ARMInstrInfo::convertToThreeAddress(), llvm::XCoreInstrInfo::copyRegToReg(), llvm::X86RegisterInfo::eliminateCallFramePseudoInstr(), llvm::SparcRegisterInfo::eliminateCallFramePseudoInstr(), llvm::PPCRegisterInfo::eliminateCallFramePseudoInstr(), llvm::IA64RegisterInfo::eliminateCallFramePseudoInstr(), llvm::XCoreRegisterInfo::eliminateFrameIndex(), llvm::PPCRegisterInfo::eliminateFrameIndex(), llvm::IA64RegisterInfo::eliminateFrameIndex(), emitARMRegPlusImmediate(), llvm::SPURegisterInfo::emitEpilogue(), llvm::PPCRegisterInfo::emitEpilogue(), llvm::MipsRegisterInfo::emitEpilogue(), llvm::ARMRegisterInfo::emitEpilogue(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::SparcTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::PIC16TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::AlphaTargetLowering::EmitInstrWithCustomInserter(), llvm::ARMRegisterInfo::emitLoadConstPool(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::X86RegisterInfo::emitPrologue(), llvm::SPURegisterInfo::emitPrologue(), llvm::SparcRegisterInfo::emitPrologue(), llvm::PPCRegisterInfo::emitPrologue(), llvm::MipsRegisterInfo::emitPrologue(), llvm::IA64RegisterInfo::emitPrologue(), llvm::ARMRegisterInfo::emitPrologue(), llvm::AlphaRegisterInfo::emitPrologue(), emitSPUpdate(), emitThumbRegPlusImmediate(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::FastISel::FastEmitInst_i(), llvm::FastISel::FastEmitInst_ri(), llvm::FastISel::FastEmitInst_rri(), llvm::SparcInstrInfo::foldMemoryOperandImpl(), llvm::MipsInstrInfo::foldMemoryOperandImpl(), llvm::ARMInstrInfo::foldMemoryOperandImpl(), FuseInst(), FuseTwoAddrInst(), HandleVRSaveUpdate(), llvm::PPCInstrInfo::InsertBranch(), llvm::ARMInstrInfo::InsertBranch(), llvm::AlphaInstrInfo::InsertBranch(), llvm::SPUInstrInfo::loadRegFromAddr(), llvm::SparcInstrInfo::loadRegFromAddr(), llvm::PPCInstrInfo::loadRegFromAddr(), llvm::MipsInstrInfo::loadRegFromAddr(), llvm::IA64InstrInfo::loadRegFromAddr(), llvm::AlphaInstrInfo::loadRegFromAddr(), llvm::XCoreInstrInfo::loadRegFromStackSlot(), llvm::SparcInstrInfo::loadRegFromStackSlot(), llvm::PIC16InstrInfo::loadRegFromStackSlot(), llvm::MipsInstrInfo::loadRegFromStackSlot(), llvm::ARMInstrInfo::loadRegFromStackSlot(), llvm::PPCRegisterInfo::lowerCRSpilling(), llvm::PPCRegisterInfo::lowerDynamicAlloc(), MakeM0Inst(), mergeBaseUpdateLoadStore(), mergeOps(), llvm::X86InstrInfo::reMaterialize(), llvm::XCoreInstrInfo::spillCalleeSavedRegisters(), llvm::SPUInstrInfo::storeRegToAddr(), llvm::SparcInstrInfo::storeRegToAddr(), llvm::PPCInstrInfo::storeRegToAddr(), llvm::MipsInstrInfo::storeRegToAddr(), llvm::IA64InstrInfo::storeRegToAddr(), llvm::AlphaInstrInfo::storeRegToAddr(), llvm::XCoreInstrInfo::storeRegToStackSlot(), llvm::SparcInstrInfo::storeRegToStackSlot(), llvm::PIC16InstrInfo::storeRegToStackSlot(), llvm::MipsInstrInfo::storeRegToStackSlot(), llvm::IA64InstrInfo::storeRegToStackSlot(), llvm::ARMInstrInfo::storeRegToStackSlot(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addFPImm | ( | const ConstantFP * | Val | ) | const [inline] |
Definition at line 54 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateFPImm(), and MI.
Referenced by llvm::FastISel::FastEmitInst_rf().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addMBB | ( | MachineBasicBlock * | MBB | ) | const [inline] |
Definition at line 59 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateMBB(), and MI.
Referenced by llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::AlphaTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::XCoreInstrInfo::InsertBranch(), llvm::X86InstrInfo::InsertBranch(), llvm::SPUInstrInfo::InsertBranch(), llvm::SparcInstrInfo::InsertBranch(), llvm::PPCInstrInfo::InsertBranch(), llvm::MipsInstrInfo::InsertBranch(), llvm::IA64InstrInfo::InsertBranch(), llvm::ARMInstrInfo::InsertBranch(), and llvm::AlphaInstrInfo::InsertBranch().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addFrameIndex | ( | unsigned | Idx | ) | const [inline] |
Definition at line 64 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateFI(), and MI.
Referenced by llvm::addFrameReference(), llvm::addFullAddress(), ARMInstrAddOperand(), llvm::SparcInstrInfo::foldMemoryOperandImpl(), llvm::MipsInstrInfo::foldMemoryOperandImpl(), llvm::ARMInstrInfo::foldMemoryOperandImpl(), llvm::AlphaInstrInfo::foldMemoryOperandImpl(), llvm::SPUInstrInfo::loadRegFromAddr(), llvm::SparcInstrInfo::loadRegFromAddr(), llvm::PPCInstrInfo::loadRegFromAddr(), llvm::MipsInstrInfo::loadRegFromAddr(), llvm::IA64InstrInfo::loadRegFromAddr(), llvm::XCoreInstrInfo::loadRegFromStackSlot(), llvm::SparcInstrInfo::loadRegFromStackSlot(), llvm::MipsInstrInfo::loadRegFromStackSlot(), llvm::IA64InstrInfo::loadRegFromStackSlot(), llvm::AlphaInstrInfo::loadRegFromStackSlot(), llvm::SPUInstrInfo::storeRegToAddr(), llvm::SparcInstrInfo::storeRegToAddr(), llvm::PPCInstrInfo::storeRegToAddr(), llvm::MipsInstrInfo::storeRegToAddr(), llvm::IA64InstrInfo::storeRegToAddr(), llvm::XCoreInstrInfo::storeRegToStackSlot(), llvm::SparcInstrInfo::storeRegToStackSlot(), llvm::MipsInstrInfo::storeRegToStackSlot(), llvm::IA64InstrInfo::storeRegToStackSlot(), llvm::ARMInstrInfo::storeRegToStackSlot(), llvm::AlphaInstrInfo::storeRegToStackSlot(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addConstantPoolIndex | ( | unsigned | Idx, | |
| int | Offset = 0 | |||
| ) | const [inline] |
Definition at line 69 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateCPI(), MI, and Offset.
Referenced by llvm::addConstantPoolReference(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addJumpTableIndex | ( | unsigned | Idx | ) | const [inline] |
Definition at line 75 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateJTI(), and MI.
Referenced by X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addGlobalAddress | ( | GlobalValue * | GV, | |
| int64_t | Offset = 0 | |||
| ) | const [inline] |
Definition at line 80 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateGA(), MI, and Offset.
Referenced by llvm::addFullAddress(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addExternalSymbol | ( | const char * | FnName, | |
| int64_t | Offset = 0 | |||
| ) | const [inline] |
Definition at line 86 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addOperand(), llvm::MachineOperand::CreateES(), MI, and Offset.
Referenced by llvm::X86InstrInfo::getGlobalBaseReg(), llvm::PIC16InstrInfo::loadRegFromStackSlot(), llvm::PIC16InstrInfo::storeRegToStackSlot(), and X86InstrAddOperand().
| const MachineInstrBuilder& llvm::MachineInstrBuilder::addMemOperand | ( | const MachineMemOperand & | MMO | ) | const [inline] |
Definition at line 92 of file MachineInstrBuilder.h.
References llvm::MachineInstr::addMemOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), and MI.
Referenced by llvm::addFrameReference().