LLVM API Documentation

llvm::MipsInstrInfo Class Reference

#include <MipsInstrInfo.h>

Inheritance diagram for llvm::MipsInstrInfo:
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Collaboration diagram for llvm::MipsInstrInfo:
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List of all members.

Public Member Functions

 MipsInstrInfo (MipsTargetMachine &TM)
virtual const MipsRegisterInfo & getRegisterInfo () const
virtual bool isMoveInstr (const MachineInstr &MI, unsigned &SrcReg, unsigned &DstReg, unsigned &SrcSubIdx, unsigned &DstSubIdx) const
virtual unsigned isLoadFromStackSlot (const MachineInstr *MI, int &FrameIndex) const
virtual unsigned isStoreToStackSlot (const MachineInstr *MI, int &FrameIndex) const
virtual bool AnalyzeBranch (MachineBasicBlock &MBB, MachineBasicBlock *&TBB, MachineBasicBlock *&FBB, SmallVectorImpl< MachineOperand > &Cond, bool AllowModify) const
 Branch Analysis.
virtual unsigned RemoveBranch (MachineBasicBlock &MBB) const
virtual unsigned InsertBranch (MachineBasicBlock &MBB, MachineBasicBlock *TBB, MachineBasicBlock *FBB, const SmallVectorImpl< MachineOperand > &Cond) const
virtual bool copyRegToReg (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const
virtual void storeRegToStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned SrcReg, bool isKill, int FrameIndex, const TargetRegisterClass *RC) const
virtual void storeRegToAddr (MachineFunction &MF, unsigned SrcReg, bool isKill, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, SmallVectorImpl< MachineInstr * > &NewMIs) const
virtual void loadRegFromStackSlot (MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI, unsigned DestReg, int FrameIndex, const TargetRegisterClass *RC) const
virtual void loadRegFromAddr (MachineFunction &MF, unsigned DestReg, SmallVectorImpl< MachineOperand > &Addr, const TargetRegisterClass *RC, SmallVectorImpl< MachineInstr * > &NewMIs) const
virtual MachineInstr * foldMemoryOperandImpl (MachineFunction &MF, MachineInstr *MI, const SmallVectorImpl< unsigned > &Ops, int FrameIndex) const
virtual MachineInstr * foldMemoryOperandImpl (MachineFunction &MF, MachineInstr *MI, const SmallVectorImpl< unsigned > &Ops, MachineInstr *LoadMI) const
virtual bool BlockHasNoFallThrough (const MachineBasicBlock &MBB) const
virtual bool ReverseBranchCondition (SmallVectorImpl< MachineOperand > &Cond) const
virtual void insertNoop (MachineBasicBlock &MBB, MachineBasicBlock::iterator MI) const
 Insert nop instruction when hazard condition is found.


Detailed Description

Definition at line 132 of file MipsInstrInfo.h.


Constructor & Destructor Documentation

MipsInstrInfo::MipsInstrInfo ( MipsTargetMachine &  TM  )  [explicit]

Definition at line 22 of file MipsInstrInfo.cpp.


Member Function Documentation

virtual const MipsRegisterInfo& llvm::MipsInstrInfo::getRegisterInfo (  )  const [inline, virtual]

getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).

Definition at line 142 of file MipsInstrInfo.h.

Referenced by llvm::MipsTargetMachine::getRegisterInfo().

bool MipsInstrInfo::isMoveInstr ( const MachineInstr &  MI,
unsigned &  SrcReg,
unsigned &  DstReg,
unsigned &  SrcSubIdx,
unsigned &  DstSubIdx 
) const [virtual]

Return true if the instruction is a register to register move and return the source and dest operands and their sub-register indices by reference.

Return true if the instruction is a register to register move and leave the source and dest operands in the passed parameters.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 33 of file MipsInstrInfo.cpp.

References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), isZeroImm(), and llvm::ISD::OR.

unsigned MipsInstrInfo::isLoadFromStackSlot ( const MachineInstr *  MI,
int &  FrameIndex 
) const [virtual]

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 81 of file MipsInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and isZeroImm().

unsigned MipsInstrInfo::isStoreToStackSlot ( const MachineInstr *  MI,
int &  FrameIndex 
) const [virtual]

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 102 of file MipsInstrInfo.cpp.

References llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), and isZeroImm().

bool MipsInstrInfo::AnalyzeBranch ( MachineBasicBlock &  MBB,
MachineBasicBlock *&  TBB,
MachineBasicBlock *&  FBB,
SmallVectorImpl< MachineOperand > &  Cond,
bool  AllowModify 
) const [virtual]

unsigned MipsInstrInfo::RemoveBranch ( MachineBasicBlock &  MBB  )  const [virtual]

RemoveBranch - Remove the branching code at the end of the specific MBB. This is only invoked in cases where AnalyzeBranch returns success. It returns the number of instructions that were removed.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 583 of file MipsInstrInfo.cpp.

References llvm::MachineBasicBlock::begin(), llvm::Mips::COND_INVALID, llvm::MachineBasicBlock::end(), and GetCondFromBranchOpc().

unsigned MipsInstrInfo::InsertBranch ( MachineBasicBlock &  MBB,
MachineBasicBlock *  TBB,
MachineBasicBlock *  FBB,
const SmallVectorImpl< MachineOperand > &  Cond 
) const [virtual]

InsertBranch - Insert a branch into the end of the specified MachineBasicBlock. This operands to this method are the same as those returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch returns success and when an unconditional branch (TBB is non-null, FBB is null, Cond is empty) needs to be inserted. It returns the number of instructions inserted.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 539 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::SmallVectorImpl< T >::empty(), GetCondBranchFromCond(), llvm::TargetInstrDesc::getNumOperands(), and llvm::SmallVectorImpl< T >::size().

bool MipsInstrInfo::copyRegToReg ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI,
unsigned  DestReg,
unsigned  SrcReg,
const TargetRegisterClass *  DestRC,
const TargetRegisterClass *  SrcRC 
) const [virtual]

copyRegToReg - Emit instructions to copy between a pair of registers. It returns false if the target does not how to copy between the specified registers.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 125 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::ARMCC::HI, llvm::PIC16ISD::MTHI, and llvm::PIC16ISD::MTLO.

void MipsInstrInfo::storeRegToStackSlot ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI,
unsigned  SrcReg,
bool  isKill,
int  FrameIndex,
const TargetRegisterClass *  RC 
) const [virtual]

storeRegToStackSlot - Store the specified register of the given register class to the specified stack frame index. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 183 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), and llvm::BuildMI().

void MipsInstrInfo::storeRegToAddr ( MachineFunction &  MF,
unsigned  SrcReg,
bool  isKill,
SmallVectorImpl< MachineOperand > &  Addr,
const TargetRegisterClass *  RC,
SmallVectorImpl< MachineInstr * > &  NewMIs 
) const [virtual]

storeRegToAddr - Store the specified register of the given register class to the specified address. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 203 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().

void MipsInstrInfo::loadRegFromStackSlot ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI,
unsigned  DestReg,
int  FrameIndex,
const TargetRegisterClass *  RC 
) const [virtual]

loadRegFromStackSlot - Load the specified register of the given register class from the specified stack frame index. The load instruction is to be added to the given machine basic block before the specified machine instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 235 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), and llvm::BuildMI().

void MipsInstrInfo::loadRegFromAddr ( MachineFunction &  MF,
unsigned  DestReg,
SmallVectorImpl< MachineOperand > &  Addr,
const TargetRegisterClass *  RC,
SmallVectorImpl< MachineInstr * > &  NewMIs 
) const [virtual]

loadRegFromAddr - Load the specified register of the given register class class from the specified address. The load instruction is to be added to the given machine basic block before the specified machine instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 254 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().

MachineInstr * MipsInstrInfo::foldMemoryOperandImpl ( MachineFunction &  MF,
MachineInstr *  MI,
const SmallVectorImpl< unsigned > &  Ops,
int  FrameIndex 
) const [virtual]

foldMemoryOperandImpl - Target-dependent implementation for foldMemoryOperand. Target-independent code in foldMemoryOperand will take care of adding a MachineMemOperand to the newly created instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 285 of file MipsInstrInfo.cpp.

References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), and llvm::SmallVectorImpl< T >::size().

virtual MachineInstr* llvm::MipsInstrInfo::foldMemoryOperandImpl ( MachineFunction &  MF,
MachineInstr *  MI,
const SmallVectorImpl< unsigned > &  Ops,
MachineInstr *  LoadMI 
) const [inline, virtual]

foldMemoryOperandImpl - Target-dependent implementation for foldMemoryOperand. Target-independent code in foldMemoryOperand will take care of adding a MachineMemOperand to the newly created instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 205 of file MipsInstrInfo.h.

bool MipsInstrInfo::BlockHasNoFallThrough ( const MachineBasicBlock &  MBB  )  const [virtual]

BlockHasNoFallThrough - Analyze if MachineBasicBlock does not fall-through into its successor block.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 610 of file MipsInstrInfo.cpp.

References llvm::MachineBasicBlock::back(), llvm::MachineBasicBlock::empty(), llvm::MachineInstr::getOpcode(), and llvm::ISD::RET.

bool MipsInstrInfo::ReverseBranchCondition ( SmallVectorImpl< MachineOperand > &  Cond  )  const [virtual]

ReverseBranchCondition - Return the inverse opcode of the specified Branch instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 626 of file MipsInstrInfo.cpp.

References GetOppositeBranchCondition(), and llvm::SmallVectorImpl< T >::size().

void MipsInstrInfo::insertNoop ( MachineBasicBlock &  MBB,
MachineBasicBlock::iterator  MI 
) const [virtual]

Insert nop instruction when hazard condition is found.

insertNoop - If data hazard condition is found insert the target nop instruction.

Reimplemented from llvm::TargetInstrInfo.

Definition at line 119 of file MipsInstrInfo.cpp.

References llvm::BuildMI().


The documentation for this class was generated from the following files: