1.5.6Copyright © 2003-2007 University of Illinois at Urbana-Champaign. All Rights Reserved.
LLVM API Documentation
#include <PPCInstrInfo.h>
Definition at line 64 of file PPCInstrInfo.h.
| PPCInstrInfo::PPCInstrInfo | ( | PPCTargetMachine & | TM | ) | [explicit] |
Definition at line 29 of file PPCInstrInfo.cpp.
| virtual const PPCRegisterInfo& llvm::PPCInstrInfo::getRegisterInfo | ( | ) | const [inline, virtual] |
getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 83 of file PPCInstrInfo.h.
Referenced by llvm::PPCTargetMachine::getRegisterInfo().
| const TargetRegisterClass * PPCInstrInfo::getPointerRegClass | ( | ) | const [virtual] |
getPointerRegClass - Return the register class to use to hold pointers. This is used for addressing modes.
getPointerRegClass - Return the register class to use to hold pointers. This is used for addressing modes.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 35 of file PPCInstrInfo.cpp.
References llvm::PPCTargetMachine::getSubtargetImpl(), and llvm::PPCSubtarget::isPPC64().
| bool PPCInstrInfo::isMoveInstr | ( | const MachineInstr & | MI, | |
| unsigned & | SrcReg, | |||
| unsigned & | DstReg, | |||
| unsigned & | SrcSubIdx, | |||
| unsigned & | DstSubIdx | |||
| ) | const [virtual] |
Return true if the instruction is a register to register move and return the source and dest operands and their sub-register indices by reference.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 43 of file PPCInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineInstr::getNumOperands(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), and llvm::ISD::OR.
| unsigned PPCInstrInfo::isLoadFromStackSlot | ( | const MachineInstr * | MI, | |
| int & | FrameIndex | |||
| ) | const [virtual] |
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 105 of file PPCInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
| unsigned PPCInstrInfo::isStoreToStackSlot | ( | const MachineInstr * | MI, | |
| int & | FrameIndex | |||
| ) | const [virtual] |
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 123 of file PPCInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
| MachineInstr * PPCInstrInfo::commuteInstruction | ( | MachineInstr * | MI, | |
| bool | NewMI | |||
| ) | const [virtual] |
commuteInstruction - If a target has any instructions that are commutable, but require converting to a different instruction or making non-trivial changes to commute them, this method can overloaded to do this. The default implementation of this method simply swaps the first two operands of MI and returns it.
If a target wants to make more aggressive changes, they can construct and return a new machine instruction. If an instruction cannot commute, it can also return null.
If NewMI is true, then a new machine instruction must be created.
Reimplemented from llvm::TargetInstrInfoImpl.
Definition at line 144 of file PPCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::TargetInstrInfoImpl::commuteInstruction(), llvm::MachineInstr::getDesc(), llvm::MachineOperand::getImm(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::TargetInstrDesc::getOperandConstraint(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), MF, llvm::MachineOperand::setImm(), llvm::MachineOperand::setIsKill(), llvm::MachineOperand::setReg(), and llvm::TOI::TIED_TO.
| void PPCInstrInfo::insertNoop | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI | |||
| ) | const [virtual] |
insertNoop - Insert a noop into the instruction stream at the specified point.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 208 of file PPCInstrInfo.cpp.
References llvm::BuildMI().
| bool PPCInstrInfo::AnalyzeBranch | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock *& | TBB, | |||
| MachineBasicBlock *& | FBB, | |||
| SmallVectorImpl< MachineOperand > & | Cond, | |||
| bool | AllowModify | |||
| ) | const [virtual] |
AnalyzeBranch - Analyze the branching code at the end of MBB, returning true if it cannot be understood (e.g. it's a switch dispatch or isn't implemented for a target). Upon success, this returns false and returns with the following information in various cases:
1. If this block ends with no branches (it just falls through to its succ) just return false, leaving TBB/FBB null. 2. If this block ends with only an unconditional branch, it sets TBB to be the destination block. 3. If this block ends with an conditional branch and it falls through to an successor block, it sets TBB to be the branch destination block and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches. 4. If this block ends with an conditional branch and an unconditional block, it returns the 'true' destination in TBB, the 'false' destination in FBB, and a list of operands that evaluate the condition. These operands can be passed to other TargetInstrInfo methods to create new branches.
Note that RemoveBranch and InsertBranch must be implemented to support cases where this method returns success.
If AllowModify is true, then this routine is allowed to modify the basic block (e.g. delete instructions after the unconditional branch).
Reimplemented from llvm::TargetInstrInfo.
Definition at line 215 of file PPCInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), llvm::MachineBasicBlock::end(), llvm::MachineInstr::eraseFromParent(), llvm::MachineOperand::getMBB(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::TargetInstrInfo::isUnpredicatedTerminator(), and llvm::SmallVectorImpl< T >::push_back().
| unsigned PPCInstrInfo::RemoveBranch | ( | MachineBasicBlock & | MBB | ) | const [virtual] |
RemoveBranch - Remove the branching code at the end of the specific MBB. This is only invoked in cases where AnalyzeBranch returns success. It returns the number of instructions that were removed.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 276 of file PPCInstrInfo.cpp.
References llvm::MachineBasicBlock::begin(), and llvm::MachineBasicBlock::end().
| unsigned PPCInstrInfo::InsertBranch | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock * | TBB, | |||
| MachineBasicBlock * | FBB, | |||
| const SmallVectorImpl< MachineOperand > & | Cond | |||
| ) | const [virtual] |
InsertBranch - Insert a branch into the end of the specified MachineBasicBlock. This operands to this method are the same as those returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch returns success and when an unconditional branch (TBB is non-null, FBB is null, Cond is empty) needs to be inserted. It returns the number of instructions inserted.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 299 of file PPCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addMBB(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::SmallVectorImpl< T >::empty(), and llvm::SmallVectorImpl< T >::size().
| bool PPCInstrInfo::copyRegToReg | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | DestReg, | |||
| unsigned | SrcReg, | |||
| const TargetRegisterClass * | DestRC, | |||
| const TargetRegisterClass * | SrcRC | |||
| ) | const [virtual] |
copyRegToReg - Emit instructions to copy between a pair of registers. It returns false if the target does not how to copy between the specified registers.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 324 of file PPCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::ISD::OR.
| void PPCInstrInfo::storeRegToStackSlot | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | SrcReg, | |||
| bool | isKill, | |||
| int | FrameIndex, | |||
| const TargetRegisterClass * | RC | |||
| ) | const [virtual] |
storeRegToStackSlot - Store the specified register of the given register class to the specified stack frame index. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 466 of file PPCInstrInfo.cpp.
References llvm::MachineFunction::getInfo(), llvm::MachineBasicBlock::getParent(), llvm::MachineBasicBlock::insert(), llvm::PPCFunctionInfo::setSpillsCR(), and llvm::SmallVectorImpl< T >::size().
| void PPCInstrInfo::storeRegToAddr | ( | MachineFunction & | MF, | |
| unsigned | SrcReg, | |||
| bool | isKill, | |||
| SmallVectorImpl< MachineOperand > & | Addr, | |||
| const TargetRegisterClass * | RC, | |||
| SmallVectorImpl< MachineInstr * > & | NewMIs | |||
| ) | const [virtual] |
storeRegToAddr - Store the specified register of the given register class to the specified address. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 482 of file PPCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineFunction::getInfo(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), llvm::PPCFunctionInfo::setSpillsCR(), and llvm::SmallVectorImpl< T >::size().
| void PPCInstrInfo::loadRegFromStackSlot | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | DestReg, | |||
| int | FrameIndex, | |||
| const TargetRegisterClass * | RC | |||
| ) | const [virtual] |
loadRegFromStackSlot - Load the specified register of the given register class from the specified stack frame index. The load instruction is to be added to the given machine basic block before the specified machine instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 611 of file PPCInstrInfo.cpp.
References llvm::MachineBasicBlock::getParent(), llvm::MachineBasicBlock::insert(), and llvm::SmallVectorImpl< T >::size().
| void PPCInstrInfo::loadRegFromAddr | ( | MachineFunction & | MF, | |
| unsigned | DestReg, | |||
| SmallVectorImpl< MachineOperand > & | Addr, | |||
| const TargetRegisterClass * | RC, | |||
| SmallVectorImpl< MachineInstr * > & | NewMIs | |||
| ) | const [virtual] |
loadRegFromAddr - Load the specified register of the given register class class from the specified address. The load instruction is to be added to the given machine basic block before the specified machine instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 622 of file PPCInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().
| MachineInstr * PPCInstrInfo::foldMemoryOperandImpl | ( | MachineFunction & | MF, | |
| MachineInstr * | MI, | |||
| const SmallVectorImpl< unsigned > & | Ops, | |||
| int | FrameIndex | |||
| ) | const [virtual] |
foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into copy instructions, turning them into load/store instructions.
foldMemoryOperand - PowerPC (like most RISC's) can only fold spills into copy instructions, turning them into load/store instructions.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 664 of file PPCInstrInfo.cpp.
References llvm::addFrameReference(), llvm::BuildMI(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::Attribute::InReg, llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), llvm::ISD::OR, and llvm::SmallVectorImpl< T >::size().
| virtual MachineInstr* llvm::PPCInstrInfo::foldMemoryOperandImpl | ( | MachineFunction & | MF, | |
| MachineInstr * | MI, | |||
| const SmallVectorImpl< unsigned > & | Ops, | |||
| MachineInstr * | LoadMI | |||
| ) | const [inline, virtual] |
foldMemoryOperandImpl - Target-dependent implementation for foldMemoryOperand. Target-independent code in foldMemoryOperand will take care of adding a MachineMemOperand to the newly created instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 150 of file PPCInstrInfo.h.
| bool PPCInstrInfo::canFoldMemoryOperand | ( | const MachineInstr * | MI, | |
| const SmallVectorImpl< unsigned > & | Ops | |||
| ) | const [virtual] |
canFoldMemoryOperand - Returns true for the specified load / store if folding is possible.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 739 of file PPCInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::ISD::OR, and llvm::SmallVectorImpl< T >::size().
| bool PPCInstrInfo::BlockHasNoFallThrough | ( | const MachineBasicBlock & | MBB | ) | const [virtual] |
BlockHasNoFallThrough - Return true if the specified block does not fall-through into its successor block. This is primarily used when a branch is unanalyzable. It is useful for things like unconditional indirect branches (jump tables).
Reimplemented from llvm::TargetInstrInfo.
Definition at line 760 of file PPCInstrInfo.cpp.
References llvm::MachineBasicBlock::back(), llvm::MachineBasicBlock::empty(), and llvm::MachineInstr::getOpcode().
| bool PPCInstrInfo::ReverseBranchCondition | ( | SmallVectorImpl< MachineOperand > & | Cond | ) | const [virtual] |
ReverseBranchCondition - Reverses the branch condition of the specified condition list, returning false on success and true if it cannot be reversed.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 773 of file PPCInstrInfo.cpp.
References llvm::PPC::InvertPredicate(), and llvm::SmallVectorImpl< T >::size().
| unsigned PPCInstrInfo::GetInstSizeInBytes | ( | const MachineInstr * | MI | ) | const [virtual] |
GetInstSize - Return the number of bytes of code the specified instruction may be. This returns the maximum number of bytes.
GetInstSize - Return the number of bytes of code the specified instruction may be. This returns the maximum number of bytes.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 783 of file PPCInstrInfo.cpp.
References llvm::ISD::DBG_LABEL, llvm::ISD::EH_LABEL, llvm::TargetAsmInfo::getInlineAsmLength(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineInstr::getParent(), llvm::MachineOperand::getSymbolName(), llvm::MachineFunction::getTarget(), llvm::TargetMachine::getTargetAsmInfo(), and llvm::ISD::INLINEASM.
Generated on Thu Nov 5 23:53:30 2009 for LLVM by
1.5.6
Copyright © 2003-2007 University of Illinois at Urbana-Champaign.
All Rights Reserved.