llvm::SPUTargetLowering Class Reference

#include <SPUISelLowering.h>

Inheritance diagram for llvm::SPUTargetLowering:

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Collaboration diagram for llvm::SPUTargetLowering:

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List of all members.

Public Member Functions
	SPUTargetLowering (SPUTargetMachine &TM)
	The venerable constructor.
SPUTargetMachine &	getSPUTargetMachine ()
	Get the target machine.
virtual const char *	getTargetNodeName (unsigned Opcode) const
virtual MVT	getSetCCResultType (MVT VT) const
	getSetCCResultType - Return the ValueType for ISD::SETCC
virtual SDValue	LowerOperation (SDValue Op, SelectionDAG &DAG)
	Custom lowering hooks.
virtual void	ReplaceNodeResults (SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG)
	Custom lowering hook for nodes with illegal result types.
virtual SDValue	PerformDAGCombine (SDNode *N, DAGCombinerInfo &DCI) const
virtual void	computeMaskedBitsForTargetNode (const SDValue Op, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
	Compute used/known bits for a SPU operand.
virtual unsigned	ComputeNumSignBitsForTargetNode (SDValue Op, unsigned Depth=0) const
ConstraintType	getConstraintType (const std::string &ConstraintLetter) const
std::pair< unsigned, const TargetRegisterClass * >	getRegForInlineAsmConstraint (const std::string &Constraint, MVT VT) const
void	LowerAsmOperandForConstraint (SDValue Op, char ConstraintLetter, bool hasMemory, std::vector< SDValue > &Ops, SelectionDAG &DAG) const
virtual bool	isLegalAddressImmediate (int64_t V, const Type *Ty) const
virtual bool	isLegalAddressImmediate (GlobalValue *) const
virtual bool	isOffsetFoldingLegal (const GlobalAddressSDNode *GA) const

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Detailed Description

Definition at line 89 of file SPUISelLowering.h.

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Constructor & Destructor Documentation

SPUTargetLowering::SPUTargetLowering

(

SPUTargetMachine &

TM

)

The venerable constructor.

This is where the CellSPU backend sets operation handling (i.e., legal, custom, expand or promote.)

Definition at line 123 of file SPUISelLowering.cpp.

References llvm::ISD::ADD, llvm::TargetLowering::addRegisterClass(), llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::BIT_CONVERT, llvm::ISD::BR_CC, llvm::ISD::BR_JT, llvm::ISD::BSWAP, llvm::ISD::BUILD_PAIR, llvm::ISD::BUILD_VECTOR, llvm::TargetLowering::computeRegisterProperties(), llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CTLZ, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::TargetLowering::Custom, llvm::ISD::DBG_STOPPOINT, llvm::ISD::DEBUG_LOC, llvm::RTLIB::DIV_F64, llvm::ISD::DYNAMIC_STACKALLOC, llvm::TargetLowering::Expand, llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::MVT::f128, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FDIV, llvm::MVT::FIRST_VECTOR_VALUETYPE, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FREM, llvm::ISD::FSIN, llvm::ISD::FSQRT, llvm::ISD::GlobalAddress, llvm::MVT::i1, llvm::MVT::i128, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::JumpTable, llvm::MVT::LAST_VECTOR_VALUETYPE, llvm::TargetLowering::Legal, llvm::ISD::LOAD, llvm::ISD::MEMBARRIER, llvm::ISD::MUL, llvm::ISD::OR, llvm::MVT::Other, llvm::TargetLowering::Promote, llvm::ISD::RET, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SCALAR_TO_VECTOR, llvm::TargetLowering::SchedulingForRegPressure, llvm::ISD::SDIV, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::TargetLowering::setBooleanContents(), llvm::ISD::SETCC, llvm::TargetLowering::setLibcallName(), llvm::TargetLowering::setLoadExtAction(), llvm::TargetLowering::setOperationAction(), llvm::TargetLowering::setPow2DivIsCheap(), llvm::TargetLowering::setSchedulingPreference(), llvm::TargetLowering::setShiftAmountType(), llvm::TargetLowering::setStackPointerRegisterToSaveRestore(), llvm::TargetLowering::setTargetDAGCombine(), llvm::TargetLowering::setTruncStoreAction(), llvm::TargetLowering::setUseUnderscoreLongJmp(), llvm::TargetLowering::setUseUnderscoreSetJmp(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SRA, llvm::ISD::SREM, llvm::ISD::SRL, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::TRUNCATE, llvm::ISD::UDIV, llvm::ISD::UINT_TO_FP, llvm::ISD::UREM, llvm::MVT::v16i8, llvm::MVT::v2f64, llvm::MVT::v2i32, llvm::MVT::v2i64, llvm::MVT::v4f32, llvm::MVT::v4i32, llvm::MVT::v8i16, llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, llvm::ISD::VASTART, llvm::ISD::VECTOR_SHUFFLE, VT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, llvm::TargetLowering::ZeroOrNegativeOneBooleanContent, and llvm::ISD::ZEXTLOAD.

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Member Function Documentation

SPUTargetMachine& llvm::SPUTargetLowering::getSPUTargetMachine

(

)

[inline]

Get the target machine.

Definition at line 105 of file SPUISelLowering.h.

const char * SPUTargetLowering::getTargetNodeName

(

unsigned

Opcode

)

const [virtual]

getTargetNodeName() - This method returns the name of a target specific DAG node.

Reimplemented from llvm::TargetLowering.

Definition at line 427 of file SPUISelLowering.cpp.

References llvm::SPUISD::ADD64_MARKER, llvm::SPUISD::AFormAddr, llvm::SPUISD::CALL, llvm::SPUISD::CNTB, llvm::SPUISD::Hi, llvm::SPUISD::IndirectAddr, llvm::SPUISD::LDRESULT, llvm::SPUISD::Lo, llvm::SPUISD::MUL64_MARKER, llvm::SPUISD::PCRelAddr, llvm::SPUISD::PREFSLOT2VEC, llvm::SPUISD::RET_FLAG, llvm::SPUISD::ROTBYTES_LEFT, llvm::SPUISD::ROTBYTES_LEFT_BITS, llvm::SPUISD::SELB, llvm::SPUISD::SELECT_MASK, llvm::SPUISD::SHLQUAD_L_BITS, llvm::SPUISD::SHLQUAD_L_BYTES, llvm::SPUISD::SHUFB, llvm::SPUISD::SHUFFLE_MASK, llvm::SPUISD::SUB64_MARKER, llvm::SPUISD::VEC2PREFSLOT, llvm::SPUISD::VEC_ROTL, llvm::SPUISD::VEC_ROTR, llvm::SPUISD::VEC_SHL, llvm::SPUISD::VEC_SRA, and llvm::SPUISD::VEC_SRL.

MVT SPUTargetLowering::getSetCCResultType

(

MVT

VT

)

const [virtual]

getSetCCResultType - Return the ValueType for ISD::SETCC

Reimplemented from llvm::TargetLowering.

Definition at line 469 of file SPUISelLowering.cpp.

References llvm::MVT::i16, llvm::MVT::i32, and llvm::MVT::i8.

SDValue SPUTargetLowering::LowerOperation	(	SDValue	Op,
		SelectionDAG &	DAG
	)			[virtual]

Custom lowering hooks.

Custom (target-specific) lowering entry point.

This is where LLVM's DAG selection process calls to do target-specific lowering of nodes.

Reimplemented from llvm::TargetLowering.

Definition at line 2654 of file SPUISelLowering.cpp.

References llvm::ISD::ADD, llvm::ISD::AND, llvm::ISD::BUILD_VECTOR, llvm::ISD::CALL, llvm::cerr(), llvm::ISD::ConstantFP, llvm::ISD::ConstantPool, llvm::ISD::CTPOP, llvm::SDNode::dump(), llvm::ISD::EXTLOAD, llvm::ISD::EXTRACT_VECTOR_ELT, llvm::ISD::FORMAL_ARGUMENTS, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SPUTargetMachine::getSubtargetImpl(), llvm::TargetLowering::getTargetMachine(), llvm::SDValue::getValueType(), llvm::ISD::GlobalAddress, llvm::MVT::i8, llvm::ISD::INSERT_VECTOR_ELT, llvm::ISD::JumpTable, llvm::ISD::LOAD, LowerBUILD_VECTOR(), LowerByteImmed(), LowerCALL(), LowerConstantFP(), LowerConstantPool(), LowerCTPOP(), LowerEXTRACT_VECTOR_ELT(), LowerFORMAL_ARGUMENTS(), LowerFP_TO_INT(), LowerGlobalAddress(), LowerI8Math(), LowerINSERT_VECTOR_ELT(), LowerINT_TO_FP(), LowerJumpTable(), LowerLOAD(), LowerRET(), LowerSCALAR_TO_VECTOR(), LowerSELECT_CC(), LowerSETCC(), LowerSTORE(), LowerTRUNCATE(), LowerVECTOR_SHUFFLE(), llvm::ISD::MUL, llvm::ISD::OR, llvm::ISD::RET, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SCALAR_TO_VECTOR, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::ISD::SEXTLOAD, llvm::ISD::SHL, llvm::ISD::SINT_TO_FP, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::STORE, llvm::ISD::SUB, llvm::ISD::TRUNCATE, llvm::ISD::UINT_TO_FP, llvm::ISD::VECTOR_SHUFFLE, VT, llvm::ISD::XOR, and llvm::ISD::ZEXTLOAD.

void SPUTargetLowering::ReplaceNodeResults	(	SDNode *	N,
		SmallVectorImpl< SDValue > &	Results,
		SelectionDAG &	DAG
	)			[virtual]

Custom lowering hook for nodes with illegal result types.

Reimplemented from llvm::TargetLowering.

Definition at line 2749 of file SPUISelLowering.cpp.

References llvm::cerr(), llvm::SDNode::dump(), llvm::SDNode::getOpcode(), and llvm::SDNode::getValueType().

SDValue SPUTargetLowering::PerformDAGCombine	(	SDNode *	N,
		DAGCombinerInfo &	DCI
	)			const [virtual]

PerformDAGCombine - This method will be invoked for all target nodes and for any target-independent nodes that the target has registered with invoke it for.

The semantics are as follows: Return Value: SDValue.Val == 0 - No change was made SDValue.Val == N - N was replaced, is dead, and is already handled. otherwise - N should be replaced by the returned Operand.

In addition, methods provided by DAGCombinerInfo may be used to perform more complex transformations.

Reimplemented from llvm::TargetLowering.

Definition at line 2777 of file SPUISelLowering.cpp.

References llvm::ISD::ADD, llvm::SPUISD::AFormAddr, llvm::ISD::ANY_EXTEND, llvm::cerr(), llvm::TargetLowering::DAGCombinerInfo::DAG, DAG, DEBUG, DEBUG_TYPE, llvm::DebugFlag, llvm::SDNode::dump(), llvm::dyn_cast(), llvm::SelectionDAG::getConstant(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDValue::getOperand(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getSExtValue(), llvm::SPUTargetMachine::getSubtargetImpl(), llvm::TargetLowering::getTargetMachine(), llvm::SDValue::getValueType(), llvm::SDNode::getValueType(), llvm::ConstantSDNode::getZExtValue(), llvm::SPUISD::IndirectAddr, llvm::isCurrentDebugType(), llvm::ConstantSDNode::isNullValue(), llvm::SPUISD::PREFSLOT2VEC, llvm::SPUISD::ROTBYTES_LEFT, llvm::SPUISD::SHLQUAD_L_BITS, llvm::SPUISD::SHLQUAD_L_BYTES, llvm::ISD::SIGN_EXTEND, TM, llvm::SPUSubtarget::usingLargeMem(), llvm::SPUISD::VEC2PREFSLOT, llvm::SPUISD::VEC_SHL, llvm::SPUISD::VEC_SRA, llvm::SPUISD::VEC_SRL, and llvm::ISD::ZERO_EXTEND.

void SPUTargetLowering::computeMaskedBitsForTargetNode	(	const SDValue	Op,
		const APInt &	Mask,
		APInt &	KnownZero,
		APInt &	KnownOne,
		const SelectionDAG &	DAG,
		unsigned	Depth = 0
	)			const [virtual]

Compute used/known bits for a SPU operand.

Reimplemented from llvm::TargetLowering.

Definition at line 3013 of file SPUISelLowering.cpp.

References llvm::X86ISD::CALL, llvm::SPUISD::CNTB, llvm::SDValue::getOpcode(), llvm::SPUISD::LDRESULT, llvm::SPUISD::PREFSLOT2VEC, llvm::SPUISD::ROTBYTES_LEFT, llvm::SPUISD::SELB, llvm::SPUISD::SELECT_MASK, llvm::SPUISD::SHLQUAD_L_BITS, llvm::SPUISD::SHLQUAD_L_BYTES, llvm::SPUISD::SHUFB, llvm::SPUISD::SHUFFLE_MASK, llvm::SPUISD::VEC2PREFSLOT, llvm::SPUISD::VEC_ROTL, llvm::SPUISD::VEC_ROTR, llvm::SPUISD::VEC_SHL, llvm::SPUISD::VEC_SRA, and llvm::SPUISD::VEC_SRL.

unsigned SPUTargetLowering::ComputeNumSignBitsForTargetNode	(	SDValue	Op,
		unsigned	Depth = 0
	)			const [virtual]

ComputeNumSignBitsForTargetNode - This method can be implemented by targets that want to expose additional information about sign bits to the DAG Combiner.

ComputeNumSignBitsForTargetNode - This method can be implemented by targets that want to expose additional information about sign bits to the DAG Combiner.

Reimplemented from llvm::TargetLowering.

Definition at line 3048 of file SPUISelLowering.cpp.

References llvm::SDValue::getOpcode(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueType(), llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::ISD::SETCC, and VT.

SPUTargetLowering::ConstraintType SPUTargetLowering::getConstraintType

(

const std::string &

ConstraintLetter

)

const [virtual]

getConstraintType - Given a constraint letter, return the type of constraint it is for this target.

Reimplemented from llvm::TargetLowering.

Definition at line 2970 of file SPUISelLowering.cpp.

References llvm::TargetLowering::C_RegisterClass, and llvm::TargetLowering::getConstraintType().

std::pair< unsigned, const TargetRegisterClass * > SPUTargetLowering::getRegForInlineAsmConstraint	(	const std::string &	Constraint,
		MVT	VT
	)			const [virtual]

getRegForInlineAsmConstraint - Given a physical register constraint (e.g. {edx}), return the register number and the register class for the register.

Given a register class constraint, like 'r', if this corresponds directly to an LLVM register class, return a register of 0 and the register class pointer.

This should only be used for C_Register constraints. On error, this returns a register number of 0 and a null register class pointer..

Reimplemented from llvm::TargetLowering.

Definition at line 2986 of file SPUISelLowering.cpp.

References llvm::MVT::f32, llvm::MVT::f64, llvm::TargetLowering::getRegForInlineAsmConstraint(), and llvm::MVT::i64.

void SPUTargetLowering::LowerAsmOperandForConstraint	(	SDValue	Op,
		char	ConstraintLetter,
		bool	hasMemory,
		std::vector< SDValue > &	Ops,
		SelectionDAG &	DAG
	)			const [virtual]

LowerAsmOperandForConstraint - Lower the specified operand into the Ops vector. If it is invalid, don't add anything to Ops. If hasMemory is true it means one of the asm constraint of the inline asm instruction being processed is 'm'.

LowerAsmOperandForConstraint - Lower the specified operand into the Ops vector. If it is invalid, don't add anything to Ops.

Reimplemented from llvm::TargetLowering.

Definition at line 3067 of file SPUISelLowering.cpp.

References llvm::TargetLowering::LowerAsmOperandForConstraint().

bool SPUTargetLowering::isLegalAddressImmediate	(	int64_t	V,
		const Type *	Ty
	)			const [virtual]

isLegalAddressImmediate - Return true if the integer value can be used as the offset of the target addressing mode.

isLegalAddressImmediate - Return true if the integer value can be used as the offset of the target addressing mode.

Definition at line 3079 of file SPUISelLowering.cpp.

bool SPUTargetLowering::isLegalAddressImmediate

(

llvm::GlobalValue *

GV

)

const [virtual]

Definition at line 3085 of file SPUISelLowering.cpp.

bool SPUTargetLowering::isOffsetFoldingLegal

(

const GlobalAddressSDNode *

GA

)

const [virtual]

isOffsetFoldingLegal - Return true if folding a constant offset with the given GlobalAddress is legal. It is frequently not legal in PIC relocation models.

Reimplemented from llvm::TargetLowering.

Definition at line 3090 of file SPUISelLowering.cpp.

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The documentation for this class was generated from the following files:

• SPUISelLowering.h
• SPUISelLowering.cpp