llvm::SelectionDAGISel Class Reference

#include <SelectionDAGISel.h>

Inheritance diagram for llvm::SelectionDAGISel:

Collaboration diagram for llvm::SelectionDAGISel:

List of all members.

Public Member Functions

SelectionDAGISel (TargetMachine &tm, bool fast=false)

virtual ~SelectionDAGISel ()

TargetLowering & getTargetLowering ()

virtual void getAnalysisUsage (AnalysisUsage &AU) const

virtual bool runOnFunction (Function &Fn)

unsigned MakeReg (MVT VT)

virtual void EmitFunctionEntryCode (Function &Fn, MachineFunction &MF)

virtual void InstructionSelect ()=0

void SelectRootInit ()

virtual bool SelectInlineAsmMemoryOperand (const SDValue &Op, char ConstraintCode, std::vector< SDValue > &OutOps)

virtual bool IsLegalAndProfitableToFold (SDNode *N, SDNode *U, SDNode *Root) const

virtual ScheduleHazardRecognizer * CreateTargetHazardRecognizer ()

Public Attributes

const TargetMachine & TM

TargetLowering & TLI

FunctionLoweringInfo * FuncInfo

MachineFunction * MF

MachineRegisterInfo * RegInfo

SelectionDAG * CurDAG

SelectionDAGLowering * SDL

MachineBasicBlock * BB

AliasAnalysis * AA

GCFunctionInfo * GFI

bool Fast

Static Public Attributes

static char ID = 0

Protected Member Functions

void SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops)

bool CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const

bool CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const

Protected Attributes

unsigned DAGSize

Detailed Description

SelectionDAGISel - This is the common base class used for SelectionDAG-based pattern-matching instruction selectors.

Definition at line 42 of file SelectionDAGISel.h.

Constructor & Destructor Documentation

SelectionDAGISel::SelectionDAGISel	(	TargetMachine &	tm,
		bool	fast = `false`
	)			`[explicit]`

Definition at line 267 of file SelectionDAGISel.cpp.

SelectionDAGISel::~SelectionDAGISel ( ) [virtual]

Definition at line 277 of file SelectionDAGISel.cpp.

References CurDAG, FuncInfo, and SDL.

Member Function Documentation

TargetLowering& llvm::SelectionDAGISel::getTargetLowering ( ) [inline]

Definition at line 60 of file SelectionDAGISel.h.

References TLI.

Referenced by llvm::createDefaultScheduler().

void SelectionDAGISel::getAnalysisUsage ( AnalysisUsage & ) const [virtual]

getAnalysisUsage - This function should be overriden by passes that need analysis information to do their job. If a pass specifies that it uses a particular analysis result to this function, it can then use the getAnalysis<AnalysisType>() function, below.

Reimplemented from llvm::Pass.

Definition at line 287 of file SelectionDAGISel.cpp.

References llvm::AnalysisUsage::addRequired(), and llvm::AnalysisUsage::setPreservesAll().

bool SelectionDAGISel::runOnFunction ( Function & F ) [virtual]

runOnFunction - Virtual method overriden by subclasses to do the per-function processing of the pass.

Implements llvm::FunctionPass.

Definition at line 294 of file SelectionDAGISel.cpp.

References AA, llvm::MachineFunction::begin(), llvm::Function::begin(), llvm::FunctionLoweringInfo::CatchInfoFound, llvm::FunctionLoweringInfo::CatchInfoLost, llvm::FunctionLoweringInfo::clear(), llvm::MachineFunction::construct(), CurDAG, DOUT, DW, E, EmitLiveInCopies(), llvm::EnableFastISel, EnableFastISelAbort, llvm::Function::end(), FuncInfo, llvm::MachineFunction::getFunction(), llvm::Value::getName(), llvm::MachineFunction::getRegInfo(), llvm::TargetLowering::getTargetMachine(), GFI, llvm::Function::hasGC(), llvm::SelectionDAGLowering::init(), llvm::SelectionDAG::init(), llvm::MachineRegisterInfo::livein_begin(), llvm::MachineRegisterInfo::livein_end(), llvm::FunctionLoweringInfo::MBBMap, MF, MMI, RegInfo, SDL, llvm::FunctionLoweringInfo::set(), TII, TLI, TM, and TRI.

unsigned SelectionDAGISel::MakeReg ( MVT VT )

Definition at line 283 of file SelectionDAGISel.cpp.

References llvm::MachineRegisterInfo::createVirtualRegister(), llvm::TargetLowering::getRegClassFor(), RegInfo, and TLI.

virtual void llvm::SelectionDAGISel::EmitFunctionEntryCode	(	Function &	Fn,
		MachineFunction &	MF
	)			`[inline, virtual]`

Definition at line 68 of file SelectionDAGISel.h.

virtual void llvm::SelectionDAGISel::InstructionSelect ( ) [pure virtual]

void llvm::SelectionDAGISel::SelectRootInit ( ) [inline]

Definition at line 71 of file SelectionDAGISel.h.

References llvm::SelectionDAG::AssignTopologicalOrder(), CurDAG, and DAGSize.

virtual bool llvm::SelectionDAGISel::SelectInlineAsmMemoryOperand	(	const SDValue &	Op,
		char	ConstraintCode,
		std::vector< SDValue > &	OutOps
	)			`[inline, virtual]`

SelectInlineAsmMemoryOperand - Select the specified address as a target addressing mode, according to the specified constraint code. If this does not match or is not implemented, return true. The resultant operands (which will appear in the machine instruction) should be added to the OutOps vector.

Definition at line 80 of file SelectionDAGISel.h.

Referenced by SelectInlineAsmMemoryOperands().

virtual bool llvm::SelectionDAGISel::IsLegalAndProfitableToFold	(	SDNode *	N,
		SDNode *	U,
		SDNode *	Root
	)			const `[inline, virtual]`

IsLegalAndProfitableToFold - Returns true if the specific operand node N of U can be folded during instruction selection that starts at Root and folding N is profitable.

Definition at line 90 of file SelectionDAGISel.h.

ScheduleHazardRecognizer * SelectionDAGISel::CreateTargetHazardRecognizer ( ) [virtual]

CreateTargetHazardRecognizer - Return a newly allocated hazard recognizer to use for this target when scheduling the DAG.

Definition at line 1083 of file SelectionDAGISel.cpp.

Referenced by llvm::createTDListDAGScheduler().

void SelectionDAGISel::SelectInlineAsmMemoryOperands ( std::vector< SDValue > & Ops ) [protected]

SelectInlineAsmMemoryOperands - Calls to this are automatically generated by tblgen. Others should not call it.

Definition at line 1159 of file SelectionDAGISel.cpp.

References llvm::cerr(), CurDAG, llvm::MVT::Flag, llvm::TargetLowering::getPointerTy(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetLoweringInfo(), SelectInlineAsmMemoryOperand(), and std::swap().

bool SelectionDAGISel::CheckAndMask	(	SDValue	LHS,
		ConstantSDNode *	RHS,
		int64_t	DesiredMaskS
	)			const `[protected]`

CheckAndMask - The isel is trying to match something like (and X, 255). If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an AND, and DesiredMaskS is the value specified in the .td file (e.g. 255).

Definition at line 1096 of file SelectionDAGISel.cpp.

References CurDAG, llvm::ConstantSDNode::getAPIntValue(), llvm::SDValue::getValueSizeInBits(), llvm::APInt::intersects(), and llvm::SelectionDAG::MaskedValueIsZero().

bool SelectionDAGISel::CheckOrMask	(	SDValue	LHS,
		ConstantSDNode *	RHS,
		int64_t	DesiredMaskS
	)			const `[protected]`

CheckOrMask - The isel is trying to match something like (or X, 255). If the dag combiner simplified the 255, we still want to match. RHS is the actual value in the DAG on the RHS of an OR, and DesiredMaskS is the value specified in the .td file (e.g. 255).

Definition at line 1125 of file SelectionDAGISel.cpp.

References llvm::SelectionDAG::ComputeMaskedBits(), CurDAG, llvm::ConstantSDNode::getAPIntValue(), llvm::SDValue::getValueSizeInBits(), and llvm::APInt::intersects().

Member Data Documentation

const TargetMachine& llvm::SelectionDAGISel::TM

Definition at line 44 of file SelectionDAGISel.h.

Referenced by llvm::createBURRListDAGScheduler(), llvm::createTDRRListDAGScheduler(), and runOnFunction().

TargetLowering& llvm::SelectionDAGISel::TLI

Definition at line 45 of file SelectionDAGISel.h.

Referenced by getTargetLowering(), MakeReg(), and runOnFunction().

FunctionLoweringInfo* llvm::SelectionDAGISel::FuncInfo

Definition at line 46 of file SelectionDAGISel.h.

Referenced by runOnFunction(), and ~SelectionDAGISel().

MachineFunction* llvm::SelectionDAGISel::MF

Definition at line 47 of file SelectionDAGISel.h.

Referenced by CheckDAGForTailCallsAndFixThem(), llvm::createBURRListDAGScheduler(), llvm::createFastDAGScheduler(), llvm::createTDListDAGScheduler(), llvm::createTDRRListDAGScheduler(), and runOnFunction().

MachineRegisterInfo* llvm::SelectionDAGISel::RegInfo

Definition at line 48 of file SelectionDAGISel.h.

Referenced by MakeReg(), and runOnFunction().

SelectionDAG* llvm::SelectionDAGISel::CurDAG

Definition at line 49 of file SelectionDAGISel.h.

Referenced by CheckAndMask(), CheckOrMask(), runOnFunction(), SelectInlineAsmMemoryOperands(), SelectRootInit(), and ~SelectionDAGISel().

SelectionDAGLowering* llvm::SelectionDAGISel::SDL

Definition at line 50 of file SelectionDAGISel.h.

Referenced by runOnFunction(), and ~SelectionDAGISel().

MachineBasicBlock* llvm::SelectionDAGISel::BB

Definition at line 51 of file SelectionDAGISel.h.

AliasAnalysis* llvm::SelectionDAGISel::AA

Definition at line 52 of file SelectionDAGISel.h.

Referenced by runOnFunction().

GCFunctionInfo* llvm::SelectionDAGISel::GFI

Definition at line 53 of file SelectionDAGISel.h.

Referenced by runOnFunction().

bool llvm::SelectionDAGISel::Fast

Definition at line 54 of file SelectionDAGISel.h.

char SelectionDAGISel::ID = 0 [static]

Definition at line 55 of file SelectionDAGISel.h.

unsigned llvm::SelectionDAGISel::DAGSize [protected]

DAGSize - Size of DAG being instruction selected.

Definition at line 101 of file SelectionDAGISel.h.

Referenced by SelectRootInit().

The documentation for this class was generated from the following files:


Public Member Functions
	SelectionDAGISel (TargetMachine &tm, bool fast=false)
virtual	~SelectionDAGISel ()
TargetLowering &	getTargetLowering ()
virtual void	getAnalysisUsage (AnalysisUsage &AU) const
virtual bool	runOnFunction (Function &Fn)
unsigned	MakeReg (MVT VT)
virtual void	EmitFunctionEntryCode (Function &Fn, MachineFunction &MF)
virtual void	InstructionSelect ()=0
void	SelectRootInit ()
virtual bool	SelectInlineAsmMemoryOperand (const SDValue &Op, char ConstraintCode, std::vector< SDValue > &OutOps)
virtual bool	IsLegalAndProfitableToFold (SDNode N, SDNode U, SDNode *Root) const
virtual ScheduleHazardRecognizer *	CreateTargetHazardRecognizer ()
Public Attributes
const TargetMachine &	TM
TargetLowering &	TLI
FunctionLoweringInfo *	FuncInfo
MachineFunction *	MF
MachineRegisterInfo *	RegInfo
SelectionDAG *	CurDAG
SelectionDAGLowering *	SDL
MachineBasicBlock *	BB
AliasAnalysis *	AA
GCFunctionInfo *	GFI
bool	Fast
Static Public Attributes
static char	ID = 0
Protected Member Functions
void	SelectInlineAsmMemoryOperands (std::vector< SDValue > &Ops)
bool	CheckAndMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
bool	CheckOrMask (SDValue LHS, ConstantSDNode *RHS, int64_t DesiredMaskS) const
Protected Attributes
unsigned	DAGSize