1.5.6Copyright © 2003-2007 University of Illinois at Urbana-Champaign. All Rights Reserved.
LLVM API Documentation
#include <SparcInstrInfo.h>
Definition at line 34 of file SparcInstrInfo.h.
| SparcInstrInfo::SparcInstrInfo | ( | SparcSubtarget & | ST | ) | [explicit] |
Definition at line 23 of file SparcInstrInfo.cpp.
| virtual const SparcRegisterInfo& llvm::SparcInstrInfo::getRegisterInfo | ( | ) | const [inline, virtual] |
getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As such, whenever a client has an instance of instruction info, it should always be able to get register info as well (through this method).
Definition at line 44 of file SparcInstrInfo.h.
Referenced by llvm::SparcTargetMachine::getRegisterInfo().
| bool SparcInstrInfo::isMoveInstr | ( | const MachineInstr & | MI, | |
| unsigned & | SrcReg, | |||
| unsigned & | DstReg, | |||
| unsigned & | SrcSR, | |||
| unsigned & | DstSR | |||
| ) | const [virtual] |
Return true if the instruction is a register to register move and return the source and dest operands and their sub-register indices by reference.
Return true if the instruction is a register to register move and leave the source and dest operands in the passed parameters.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 35 of file SparcInstrInfo.cpp.
References llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isReg(), and isZeroImm().
| unsigned SparcInstrInfo::isLoadFromStackSlot | ( | const MachineInstr * | MI, | |
| int & | FrameIndex | |||
| ) | const [virtual] |
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
isLoadFromStackSlot - If the specified machine instruction is a direct load from a stack slot, return the virtual or physical register number of the destination along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than loading from the stack slot.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 73 of file SparcInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
| unsigned SparcInstrInfo::isStoreToStackSlot | ( | const MachineInstr * | MI, | |
| int & | FrameIndex | |||
| ) | const [virtual] |
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
isStoreToStackSlot - If the specified machine instruction is a direct store to a stack slot, return the virtual or physical register number of the source reg along with the FrameIndex of the loaded stack slot. If not, return 0. This predicate must return 0 if the instruction has any side effects other than storing to the stack slot.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 92 of file SparcInstrInfo.cpp.
References llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), and llvm::MachineOperand::isImm().
| unsigned SparcInstrInfo::InsertBranch | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock * | TBB, | |||
| MachineBasicBlock * | FBB, | |||
| const SmallVectorImpl< MachineOperand > & | Cond | |||
| ) | const [virtual] |
InsertBranch - Insert a branch into the end of the specified MachineBasicBlock. This operands to this method are the same as those returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch returns success and when an unconditional branch (TBB is non-null, FBB is null, Cond is empty) needs to be inserted. It returns the number of instructions inserted.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 107 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addMBB(), llvm::BuildMI(), and llvm::SmallVectorImpl< T >::empty().
| bool SparcInstrInfo::copyRegToReg | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | DestReg, | |||
| unsigned | SrcReg, | |||
| const TargetRegisterClass * | DestRC, | |||
| const TargetRegisterClass * | SrcRC | |||
| ) | const [virtual] |
copyRegToReg - Emit instructions to copy between a pair of registers. It returns false if the target does not how to copy between the specified registers.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 116 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), and llvm::SparcSubtarget::isV9().
| void SparcInstrInfo::storeRegToStackSlot | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | SrcReg, | |||
| bool | isKill, | |||
| int | FrameIndex, | |||
| const TargetRegisterClass * | RC | |||
| ) | const [virtual] |
storeRegToStackSlot - Store the specified register of the given register class to the specified stack frame index. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 141 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), and llvm::BuildMI().
| void SparcInstrInfo::storeRegToAddr | ( | MachineFunction & | MF, | |
| unsigned | SrcReg, | |||
| bool | isKill, | |||
| SmallVectorImpl< MachineOperand > & | Addr, | |||
| const TargetRegisterClass * | RC, | |||
| SmallVectorImpl< MachineInstr * > & | NewMIs | |||
| ) | const [virtual] |
storeRegToAddr - Store the specified register of the given register class to the specified address. The store instruction is to be added to the given machine basic block before the specified machine instruction. If isKill is true, the register operand is the last use and must be marked kill.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 158 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().
| void SparcInstrInfo::loadRegFromStackSlot | ( | MachineBasicBlock & | MBB, | |
| MachineBasicBlock::iterator | MI, | |||
| unsigned | DestReg, | |||
| int | FrameIndex, | |||
| const TargetRegisterClass * | RC | |||
| ) | const [virtual] |
loadRegFromStackSlot - Load the specified register of the given register class from the specified stack frame index. The load instruction is to be added to the given machine basic block before the specified machine instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 190 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), and llvm::BuildMI().
| void SparcInstrInfo::loadRegFromAddr | ( | MachineFunction & | MF, | |
| unsigned | DestReg, | |||
| SmallVectorImpl< MachineOperand > & | Addr, | |||
| const TargetRegisterClass * | RC, | |||
| SmallVectorImpl< MachineInstr * > & | NewMIs | |||
| ) | const [virtual] |
loadRegFromAddr - Load the specified register of the given register class class from the specified address. The load instruction is to be added to the given machine basic block before the specified machine instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 203 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineOperand::getImm(), llvm::MachineOperand::getIndex(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isFI(), llvm::MachineOperand::isImm(), llvm::MachineOperand::isReg(), llvm::SmallVectorImpl< T >::push_back(), and llvm::SmallVectorImpl< T >::size().
| MachineInstr * SparcInstrInfo::foldMemoryOperandImpl | ( | MachineFunction & | MF, | |
| MachineInstr * | MI, | |||
| const SmallVectorImpl< unsigned > & | Ops, | |||
| int | FrameIndex | |||
| ) | const [virtual] |
foldMemoryOperandImpl - Target-dependent implementation for foldMemoryOperand. Target-independent code in foldMemoryOperand will take care of adding a MachineMemOperand to the newly created instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 232 of file SparcInstrInfo.cpp.
References llvm::MachineInstrBuilder::addFrameIndex(), llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::BuildMI(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineOperand::getReg(), llvm::MachineOperand::isDead(), llvm::MachineOperand::isKill(), llvm::MachineOperand::isReg(), and llvm::SmallVectorImpl< T >::size().
| virtual MachineInstr* llvm::SparcInstrInfo::foldMemoryOperandImpl | ( | MachineFunction & | MF, | |
| MachineInstr * | MI, | |||
| const SmallVectorImpl< unsigned > & | Ops, | |||
| MachineInstr * | LoadMI | |||
| ) | const [inline, virtual] |
foldMemoryOperandImpl - Target-dependent implementation for foldMemoryOperand. Target-independent code in foldMemoryOperand will take care of adding a MachineMemOperand to the newly created instruction.
Reimplemented from llvm::TargetInstrInfo.
Definition at line 104 of file SparcInstrInfo.h.
Generated on Thu Nov 5 23:53:36 2009 for LLVM by
1.5.6
Copyright © 2003-2007 University of Illinois at Urbana-Champaign.
All Rights Reserved.