llvm::SparcTargetLowering Class Reference

#include <SparcISelLowering.h>

Inheritance diagram for llvm::SparcTargetLowering:

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Collaboration diagram for llvm::SparcTargetLowering:

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List of all members.

Public Member Functions
	SparcTargetLowering (TargetMachine &TM)
virtual SDValue	LowerOperation (SDValue Op, SelectionDAG &DAG)
int	getVarArgsFrameOffset () const
virtual void	computeMaskedBitsForTargetNode (const SDValue Op, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
virtual void	LowerArguments (Function &F, SelectionDAG &DAG, SmallVectorImpl< SDValue > &ArgValues, DebugLoc dl)
virtual MachineBasicBlock *	EmitInstrWithCustomInserter (MachineInstr *MI, MachineBasicBlock *MBB)
virtual const char *	getTargetNodeName (unsigned Opcode) const
ConstraintType	getConstraintType (const std::string &Constraint) const
std::pair< unsigned, const TargetRegisterClass * >	getRegForInlineAsmConstraint (const std::string &Constraint, MVT VT) const
std::vector< unsigned >	getRegClassForInlineAsmConstraint (const std::string &Constraint, MVT VT) const
virtual bool	isOffsetFoldingLegal (const GlobalAddressSDNode *GA) const

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Detailed Description

Definition at line 42 of file SparcISelLowering.h.

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Constructor & Destructor Documentation

SparcTargetLowering::SparcTargetLowering

(

TargetMachine &

TM

)

Definition at line 536 of file SparcISelLowering.cpp.

References llvm::TargetLowering::addRegisterClass(), llvm::ISD::BIT_CONVERT, llvm::ISD::BR_CC, llvm::ISD::BR_JT, llvm::ISD::BRCOND, llvm::ISD::BRIND, llvm::ISD::BSWAP, llvm::TargetLowering::computeRegisterProperties(), llvm::ISD::ConstantPool, llvm::ISD::CTLZ, llvm::ISD::CTPOP, llvm::ISD::CTTZ, llvm::TargetLowering::Custom, llvm::ISD::DBG_LABEL, llvm::ISD::DBG_STOPPOINT, llvm::ISD::DEBUG_LOC, llvm::ISD::DECLARE, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::EH_LABEL, llvm::TargetLowering::Expand, llvm::ISD::EXTLOAD, llvm::MVT::f32, llvm::MVT::f64, llvm::ISD::FCOPYSIGN, llvm::ISD::FCOS, llvm::ISD::FP_TO_SINT, llvm::ISD::FP_TO_UINT, llvm::ISD::FPOW, llvm::ISD::FREM, llvm::ISD::FSIN, llvm::TargetMachine::getSubtarget(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i8, llvm::TargetLowering::Legal, llvm::ISD::MEMBARRIER, llvm::MVT::Other, llvm::TargetLowering::Promote, llvm::ISD::RET, llvm::ISD::ROTL, llvm::ISD::ROTR, llvm::ISD::SDIVREM, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SETCC, llvm::TargetLowering::setLoadExtAction(), llvm::TargetLowering::setOperationAction(), llvm::TargetLowering::setStackPointerRegisterToSaveRestore(), llvm::TargetLowering::setTruncStoreAction(), llvm::ISD::SEXTLOAD, llvm::ISD::SHL_PARTS, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SINT_TO_FP, llvm::ISD::SMUL_LOHI, llvm::ISD::SRA_PARTS, llvm::ISD::SREM, llvm::ISD::SRL_PARTS, llvm::ISD::STACKRESTORE, llvm::ISD::STACKSAVE, llvm::ISD::UDIVREM, llvm::ISD::UINT_TO_FP, llvm::ISD::UMUL_LOHI, llvm::ISD::UREM, llvm::ISD::VAARG, llvm::ISD::VACOPY, llvm::ISD::VAEND, and llvm::ISD::VASTART.

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Member Function Documentation

SDValue SparcTargetLowering::LowerOperation	(	SDValue	Op,
		SelectionDAG &	DAG
	)			[virtual]

LowerOperation - This callback is invoked for operations that are unsupported by the target, which are registered to use 'custom' lowering, and whose defined values are all legal. If the target has no operations that require custom lowering, it need not implement this. The default implementation of this aborts.

Reimplemented from llvm::TargetLowering.

Definition at line 884 of file SparcISelLowering.cpp.

References llvm::ISD::BR_CC, llvm::ISD::CALL, llvm::ISD::ConstantPool, llvm::ISD::DYNAMIC_STACKALLOC, llvm::ISD::FP_TO_SINT, llvm::ISD::FRAMEADDR, llvm::SDValue::getOpcode(), llvm::ISD::GlobalAddress, llvm::ISD::GlobalTLSAddress, LowerBR_CC(), LowerCALL(), LowerCONSTANTPOOL(), LowerDYNAMIC_STACKALLOC(), LowerFP_TO_SINT(), LowerGLOBALADDRESS(), LowerRET(), LowerSELECT_CC(), LowerSINT_TO_FP(), LowerVAARG(), LowerVASTART(), llvm::ISD::RET, llvm::ISD::RETURNADDR, llvm::ISD::SELECT_CC, llvm::ISD::SINT_TO_FP, llvm::ISD::VAARG, and llvm::ISD::VASTART.

int llvm::SparcTargetLowering::getVarArgsFrameOffset

(

)

const [inline]

Definition at line 48 of file SparcISelLowering.h.

Referenced by LowerVASTART().

void SparcTargetLowering::computeMaskedBitsForTargetNode	(	const SDValue	Op,
		const APInt &	Mask,
		APInt &	KnownZero,
		APInt &	KnownOne,
		const SelectionDAG &	DAG,
		unsigned	Depth = 0
	)			const [virtual]

computeMaskedBitsForTargetNode - Determine which of the bits specified in Mask are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.

isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to be zero. Op is expected to be a target specific node. Used by DAG combiner.

Reimplemented from llvm::TargetLowering.

Definition at line 682 of file SparcISelLowering.cpp.

References llvm::SelectionDAG::ComputeMaskedBits(), llvm::APInt::getBitWidth(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SPISD::SELECT_FCC, and llvm::SPISD::SELECT_ICC.

void SparcTargetLowering::LowerArguments	(	Function &	F,
		SelectionDAG &	DAG,
		SmallVectorImpl< SDValue > &	ArgValues,
		DebugLoc	dl
	)			[virtual]

LowerArguments - V8 uses a very simple ABI, where all values are passed in either one or two GPRs, including FP values. TODO: we should pass FP values in FP registers for fastcc functions.

Reimplemented from llvm::TargetLowering.

Definition at line 79 of file SparcISelLowering.cpp.

References llvm::ISD::ADD, llvm::MachineRegisterInfo::addLiveIn(), Arg, llvm::Function::arg_begin(), llvm::Function::arg_end(), llvm::ISD::AssertSext, llvm::ISD::BIT_CONVERT, llvm::ISD::BUILD_PAIR, llvm::MachineFrameInfo::CreateFixedObject(), llvm::MachineRegisterInfo::createVirtualRegister(), E, llvm::MVT::f32, llvm::MVT::f64, FrameIdx, llvm::SelectionDAG::getConstant(), llvm::SelectionDAG::getCopyFromReg(), llvm::SelectionDAG::getExtLoad(), llvm::SelectionDAG::getFrameIndex(), llvm::MachineFunction::getFrameInfo(), llvm::SelectionDAG::getLoad(), llvm::SelectionDAG::getMachineFunction(), llvm::SelectionDAG::getNode(), llvm::MachineFunction::getRegInfo(), llvm::SelectionDAG::getRoot(), llvm::MVT::getSimpleVT(), llvm::MVT::getSizeInBits(), llvm::SelectionDAG::getStore(), llvm::SelectionDAG::getValueType(), llvm::TargetLowering::getValueType(), llvm::MVT::i1, llvm::MVT::i16, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::i8, llvm::Function::isVarArg(), llvm::Load, MF, Offset, llvm::MVT::Other, llvm::SmallVectorImpl< T >::push_back(), RegInfo, Root, llvm::SelectionDAG::setRoot(), llvm::ISD::SEXTLOAD, llvm::ISD::TokenFactor, llvm::ISD::TRUNCATE, and llvm::ISD::UNDEF.

MachineBasicBlock * SparcTargetLowering::EmitInstrWithCustomInserter	(	MachineInstr *	MI,
		MachineBasicBlock *	MBB
	)			[virtual]

Reimplemented from llvm::TargetLowering.

Definition at line 907 of file SparcISelLowering.cpp.

References llvm::MachineInstrBuilder::addImm(), llvm::MachineInstrBuilder::addReg(), llvm::MachineBasicBlock::addSuccessor(), llvm::BuildMI(), llvm::MachineFunction::CreateMachineBasicBlock(), llvm::MachineFunction::DeleteMachineInstr(), F, llvm::TargetInstrInfo::get(), llvm::MachineBasicBlock::getBasicBlock(), llvm::MachineOperand::getImm(), llvm::TargetMachine::getInstrInfo(), llvm::MachineInstr::getOpcode(), llvm::MachineInstr::getOperand(), llvm::MachineBasicBlock::getParent(), llvm::MachineOperand::getReg(), llvm::TargetLowering::getTargetMachine(), llvm::MachineFunction::insert(), PHI, TII, and llvm::MachineBasicBlock::transferSuccessors().

const char * SparcTargetLowering::getTargetNodeName

(

unsigned

Opcode

)

const [virtual]

getTargetNodeName() - This method returns the name of a target specific DAG node.

Reimplemented from llvm::TargetLowering.

Definition at line 661 of file SparcISelLowering.cpp.

References llvm::SPISD::BRFCC, llvm::SPISD::BRICC, llvm::SPISD::CALL, llvm::SPISD::CMPFCC, llvm::SPISD::CMPICC, llvm::SPISD::FTOI, llvm::SPISD::Hi, llvm::SPISD::ITOF, llvm::SPISD::Lo, llvm::SPISD::RET_FLAG, llvm::SPISD::SELECT_FCC, and llvm::SPISD::SELECT_ICC.

SparcTargetLowering::ConstraintType SparcTargetLowering::getConstraintType

(

const std::string &

Constraint

)

const [virtual]

getConstraintType - Given a constraint letter, return the type of constraint it is for this target.

Reimplemented from llvm::TargetLowering.

Definition at line 983 of file SparcISelLowering.cpp.

References llvm::TargetLowering::C_RegisterClass, and llvm::TargetLowering::getConstraintType().

std::pair< unsigned, const TargetRegisterClass * > SparcTargetLowering::getRegForInlineAsmConstraint	(	const std::string &	Constraint,
		MVT	VT
	)			const [virtual]

getRegForInlineAsmConstraint - Given a physical register constraint (e.g. {edx}), return the register number and the register class for the register.

Given a register class constraint, like 'r', if this corresponds directly to an LLVM register class, return a register of 0 and the register class pointer.

This should only be used for C_Register constraints. On error, this returns a register number of 0 and a null register class pointer..

Reimplemented from llvm::TargetLowering.

Definition at line 995 of file SparcISelLowering.cpp.

References llvm::TargetLowering::getRegForInlineAsmConstraint().

std::vector< unsigned > SparcTargetLowering::getRegClassForInlineAsmConstraint	(	const std::string &	Constraint,
		MVT	VT
	)			const [virtual]

getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"), return a list of registers that can be used to satisfy the constraint. This should only be used for C_RegisterClass constraints.

Reimplemented from llvm::TargetLowering.

Definition at line 1008 of file SparcISelLowering.cpp.

bool SparcTargetLowering::isOffsetFoldingLegal

(

const GlobalAddressSDNode *

GA

)

const [virtual]

isOffsetFoldingLegal - Return true if folding a constant offset with the given GlobalAddress is legal. It is frequently not legal in PIC relocation models.

Reimplemented from llvm::TargetLowering.

Definition at line 1028 of file SparcISelLowering.cpp.

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The documentation for this class was generated from the following files:

• SparcISelLowering.h
• SparcISelLowering.cpp