llvm::TargetLowering Class Reference

#include <TargetLowering.h>

Inheritance diagram for llvm::TargetLowering:

Collaboration diagram for llvm::TargetLowering:

Detailed Description

TargetLowering - This class defines information used to lower LLVM code to legal SelectionDAG operators that the target instruction selector can accept natively.

This class also defines callbacks that targets must implement to lower target-specific constructs to SelectionDAG operators.

Definition at line 65 of file TargetLowering.h.

Member Typedef Documentation

typedef struct llvm::TargetLowering::IntrinsicInfo llvm::TargetLowering::IntrinisicInfo

getTgtMemIntrinsic: Given an intrinsic, checks if on the target the intrinsic will need to map to a MemIntrinsicNode (touches memory). If this is the case, it returns true and store the intrinsic information into the IntrinsicInfo that was passed to the function.

typedef std::vector<APFloat>::const_iterator llvm::TargetLowering::legal_fpimm_iterator

Definition at line 306 of file TargetLowering.h.

typedef std::vector<ArgListEntry> llvm::TargetLowering::ArgListTy

Definition at line 1083 of file TargetLowering.h.

Member Enumeration Documentation

enum llvm::TargetLowering::LegalizeAction

LegalizeAction - This enum indicates whether operations are valid for a target, and if not, what action should be used to make them valid.

Enumerator:

Legal
Promote
Expand
Custom

Definition at line 69 of file TargetLowering.h.

enum llvm::TargetLowering::OutOfRangeShiftAmount

Enumerator:

Undefined
Mask
Extend

Definition at line 76 of file TargetLowering.h.

enum llvm::TargetLowering::BooleanContent

Enumerator:

UndefinedBooleanContent
ZeroOrOneBooleanContent
ZeroOrNegativeOneBooleanContent

Definition at line 82 of file TargetLowering.h.

enum llvm::TargetLowering::SchedPreference

Enumerator:

SchedulingForLatency
SchedulingForRegPressure

Definition at line 88 of file TargetLowering.h.

enum llvm::TargetLowering::ConstraintType

Enumerator:

C_Register
C_RegisterClass
C_Memory
C_Other
C_Unknown

Definition at line 1245 of file TargetLowering.h.

Constructor & Destructor Documentation

TargetLowering::TargetLowering ( TargetMachine & TM ) [explicit]

Definition at line 403 of file TargetLowering.cpp.

References allowUnalignedMemoryAccesses, llvm::array_lengthof(), llvm::ISD::ConstantFP, llvm::ISD::DEBUG_LOC, Expand, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::f80, llvm::ISD::FEXP, llvm::ISD::FEXP2, llvm::ISD::FGETSIGN, llvm::ISD::FLOG, llvm::ISD::FLOG10, llvm::ISD::FLOG2, llvm::TargetData::getIntPtrType(), llvm::TargetMachine::getTargetAsmInfo(), getValueType(), llvm::TargetAsmInfo::hasDotLocAndDotFile(), InitCmpLibcallCCs(), InitLibcallNames(), llvm::TargetData::isLittleEndian(), llvm::ISD::LAST_INDEXED_MODE, llvm::MVT::LAST_VALUETYPE, maxStoresPerMemcpy, maxStoresPerMemmove, maxStoresPerMemset, llvm::Intrinsic::memset, llvm::MVT::Other, llvm::ISD::PRE_INC, llvm::ISD::PREFETCH, SchedulingForLatency, setIndexedLoadAction(), setIndexedStoreAction(), setOperationAction(), llvm::ISD::TRAP, Undefined, UndefinedBooleanContent, and VT.

TargetLowering::~TargetLowering ( ) [virtual]

Definition at line 484 of file TargetLowering.cpp.

Member Function Documentation

TargetMachine& llvm::TargetLowering::getTargetMachine ( ) const [inline]

Definition at line 96 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::EmitAtomicBinary(), llvm::XCoreTargetLowering::EmitInstrWithCustomInserter(), llvm::X86TargetLowering::EmitInstrWithCustomInserter(), llvm::SparcTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitInstrWithCustomInserter(), llvm::PIC16TargetLowering::EmitInstrWithCustomInserter(), llvm::ARMTargetLowering::EmitInstrWithCustomInserter(), llvm::AlphaTargetLowering::EmitInstrWithCustomInserter(), llvm::PPCTargetLowering::EmitPartwordAtomicBinary(), llvm::PPCTargetLowering::getByValTypeAlignment(), llvm::X86TargetLowering::IsEligibleForTailCallOptimization(), llvm::PPCTargetLowering::IsEligibleForTailCallOptimization(), llvm::X86TargetLowering::isLegalAddressingMode(), isOffsetFoldingLegal(), llvm::IA64TargetLowering::LowerArguments(), llvm::SPUTargetLowering::LowerOperation(), llvm::PPCTargetLowering::LowerOperation(), llvm::SPUTargetLowering::PerformDAGCombine(), llvm::PPCTargetLowering::PerformDAGCombine(), and llvm::SelectionDAGISel::runOnFunction().

const TargetData* llvm::TargetLowering::getTargetData ( ) const [inline]

Definition at line 97 of file TargetLowering.h.

Referenced by ComputeValueVTs(), llvm::SelectionDAG::CreateStackTemporary(), llvm::SelectionDAG::getConstantPool(), llvm::SelectionDAG::getMemcpy(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), LowerArguments(), LowerCallTo(), MeetsMaxMemopRequirement(), llvm::FunctionLoweringInfo::set(), and llvm::X86TargetLowering::X86TargetLowering().

bool llvm::TargetLowering::isBigEndian ( ) const [inline]

Definition at line 99 of file TargetLowering.h.

Referenced by getCopyFromParts(), and getCopyToParts().

bool llvm::TargetLowering::isLittleEndian ( ) const [inline]

Definition at line 100 of file TargetLowering.h.

Referenced by ExpandUnalignedLoad(), ExpandUnalignedStore(), and getMemsetStringVal().

MVT llvm::TargetLowering::getPointerTy ( ) const [inline]

Definition at line 101 of file TargetLowering.h.

MVT llvm::TargetLowering::getShiftAmountTy ( ) const [inline]

Definition at line 102 of file TargetLowering.h.

Referenced by BuildSDIV(), BuildUDIV(), ExpandFCOPYSIGNToBitwiseOps(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getMemsetValue(), llvm::SelectionDAG::getShiftAmountOperand(), getVShift(), LowerI8Math(), SimplifyDemandedBits(), and SimplifySetCC().

OutOfRangeShiftAmount llvm::TargetLowering::getShiftAmountFlavor ( ) const [inline]

Definition at line 103 of file TargetLowering.h.

bool llvm::TargetLowering::usesGlobalOffsetTable ( ) const [inline]

usesGlobalOffsetTable - Return true if this target uses a GOT for PIC codegen.

Definition at line 107 of file TargetLowering.h.

Referenced by llvm::AsmPrinter::EmitJumpTableInfo(), llvm::X86TargetLowering::getPICJumpTableRelocBase(), and getPICJumpTableRelocBase().

bool llvm::TargetLowering::isSelectExpensive ( ) const [inline]

isSelectExpensive - Return true if the select operation is expensive for this target.

Definition at line 111 of file TargetLowering.h.

bool llvm::TargetLowering::isIntDivCheap ( ) const [inline]

isIntDivCheap() - Return true if integer divide is usually cheaper than a sequence of several shifts, adds, and multiplies for this target.

Definition at line 115 of file TargetLowering.h.

bool llvm::TargetLowering::isPow2DivCheap ( ) const [inline]

isPow2DivCheap() - Return true if pow2 div is cheaper than a chain of srl/add/sra.

Definition at line 119 of file TargetLowering.h.

MVT TargetLowering::getSetCCResultType ( MVT VT ) const [virtual]

getSetCCResultType - Return the ValueType of the result of SETCC operations. Also used to obtain the target's preferred type for the condition operand of SELECT and BRCOND nodes. In the case of BRCOND the argument passed is MVT::Other since there are no other operands to get a type hint from.

Reimplemented in llvm::AlphaTargetLowering, llvm::SPUTargetLowering, llvm::IA64TargetLowering, llvm::MipsTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, and llvm::X86TargetLowering.

Definition at line 612 of file TargetLowering.cpp.

References llvm::TargetData::getIntPtrType(), and getValueType().

Referenced by LowerSELECT_CC(), LowerSETCC(), llvm::SelectionDAGLowering::visitBitTestCase(), llvm::SelectionDAGLowering::visitBitTestHeader(), and llvm::SelectionDAGLowering::visitJumpTableHeader().

BooleanContent llvm::TargetLowering::getBooleanContents ( ) const [inline]

getBooleanContents - For targets without i1 registers, this gives the nature of the high-bits of boolean values held in types wider than i1. "Boolean values" are special true/false values produced by nodes like SETCC and consumed (as the condition) by nodes like SELECT and BRCOND. Not to be confused with general values promoted from i1.

Definition at line 133 of file TargetLowering.h.

Referenced by llvm::SelectionDAG::ComputeMaskedBits(), and llvm::SelectionDAG::ComputeNumSignBits().

SchedPreference llvm::TargetLowering::getSchedulingPreference ( ) const [inline]

getSchedulingPreference - Return target scheduling preference.

Definition at line 136 of file TargetLowering.h.

Referenced by llvm::createDefaultScheduler().

TargetRegisterClass* llvm::TargetLowering::getRegClassFor ( MVT VT ) const [inline]

getRegClassFor - Return the register class that should be used for the specified value type. This may only be called on legal types.

Definition at line 142 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by CheckDAGForTailCallsAndFixThem(), llvm::FastISel::FastEmitInst_extractsubreg(), llvm::FastISel::getRegForValue(), llvm::IA64TargetLowering::LowerArguments(), llvm::SelectionDAGISel::MakeReg(), and llvm::FunctionLoweringInfo::MakeReg().

bool llvm::TargetLowering::isTypeLegal ( MVT VT ) const [inline]

isTypeLegal - Return true if the target has native support for the specified value type. This means that it has a register that directly holds it without promotions or expansions.

Definition at line 152 of file TargetLowering.h.

References llvm::array_lengthof(), llvm::MVT::getSimpleVT(), and llvm::MVT::isSimple().

Referenced by BuildSDIV(), BuildUDIV(), computeRegisterProperties(), ExpandUnalignedLoad(), ExpandUnalignedStore(), FindAssocWidenVecType(), FindWidenVecType(), getCopyToParts(), getRegForInlineAsmConstraint(), llvm::FastISel::getRegForValue(), getTypeToPromoteTo(), getVectorTypeBreakdown(), llvm::X86TargetLowering::getWidenVectorType(), getWidenVectorType(), isAllocatableRegister(), isConvertLegal(), isOperationLegal(), isOperationLegalOrCustom(), isTruncStoreLegal(), MeetsMaxMemopRequirement(), and PerformBuildVectorCombine().

const ValueTypeActionImpl& llvm::TargetLowering::getValueTypeActions ( ) const [inline]

Definition at line 194 of file TargetLowering.h.

LegalizeAction llvm::TargetLowering::getTypeAction ( MVT VT ) const [inline]

getTypeAction - Return how we should legalize values of this type, either it is already legal (return 'Legal') or we need to promote it to a larger type (return 'Promote'), or we need to expand it into multiple registers of smaller integer type (return 'Expand'). 'Custom' is not an option.

Definition at line 202 of file TargetLowering.h.

References llvm::TargetLowering::ValueTypeActionImpl::getTypeAction().

Referenced by getTypeToExpandTo(), getTypeToTransformTo(), and OptimizeNoopCopyExpression().

MVT llvm::TargetLowering::getTypeToTransformTo ( MVT VT ) const [inline]

getTypeToTransformTo - For types supported by the target, this is an identity function. For types that must be promoted to larger types, this returns the larger type to promote to. For integer types that are larger than the largest integer register, this contains one step in the expansion to get to the smaller register. For illegal floating point types, this returns the integer type to transform to.

Definition at line 212 of file TargetLowering.h.

References llvm::array_lengthof(), llvm::MVT::getIntegerVT(), llvm::MVT::getPow2VectorType(), llvm::MVT::getRoundIntegerType(), llvm::MVT::getSimpleVT(), llvm::MVT::getSizeInBits(), getTypeAction(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::MVT::getVectorVT(), llvm::MVT::isInteger(), llvm::MVT::isSimple(), llvm::MVT::isVector(), and Promote.

Referenced by llvm::FastISel::getRegForValue(), getRegisterType(), getTypeToExpandTo(), getVectorTypeBreakdown(), and OptimizeNoopCopyExpression().

MVT llvm::TargetLowering::getTypeToExpandTo ( MVT VT ) const [inline]

getTypeToExpandTo - For types supported by the target, this is an identity function. For types that must be expanded (i.e. integer types that are larger than the largest integer register or illegal floating point types), this returns the largest legal type it will be expanded to.

Definition at line 248 of file TargetLowering.h.

References Expand, getTypeAction(), getTypeToTransformTo(), llvm::MVT::isVector(), and Legal.

unsigned TargetLowering::getVectorTypeBreakdown	(	MVT	VT,
		MVT &	IntermediateVT,
		unsigned &	NumIntermediates,
		MVT &	RegisterVT
	)			const

getVectorTypeBreakdown - Vector types are broken down into some number of legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32 with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.

This method returns the number of registers needed, and the VT for each register. It also returns the VT and quantity of the intermediate values before they are promoted/expanded.

getVectorTypeBreakdown - Vector types are broken down into some number of legal first class types. For example, MVT::v8f32 maps to 2 MVT::v4f32 with Altivec or SSE1, or 8 promoted MVT::f64 values with the X86 FP stack. Similarly, MVT::v2i64 turns into 4 MVT::i32 values with both PPC and X86.

This method returns the number of registers needed, and the VT for each register. It also returns the VT and quantity of the intermediate values before they are promoted/expanded.

Definition at line 626 of file TargetLowering.cpp.

References llvm::MVT::bitsLT(), llvm::MVT::getSizeInBits(), getTypeToTransformTo(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), llvm::MVT::getVectorVT(), llvm::isPowerOf2_32(), and isTypeLegal().

Referenced by computeRegisterProperties(), getCopyFromParts(), getCopyToParts(), getNumRegisters(), and getRegisterType().

virtual bool llvm::TargetLowering::getTgtMemIntrinsic	(	IntrinsicInfo &	Info,
		CallInst &	I,
		unsigned	Intrinsic
	)			`[inline, virtual]`

Definition at line 294 of file TargetLowering.h.

MVT TargetLowering::getWidenVectorType ( MVT VT ) const [virtual]

getWidenVectorType: given a vector type, returns the type to widen to (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself. If there is no vector type that we want to widen to, returns MVT::Other When and were to widen is target dependent based on the cost of scalarizing vs using the wider vector type.

getWidenVectorType: given a vector type, returns the type to widen to (e.g., v7i8 to v8i8). If the vector type is legal, it returns itself. If there is no vector type that we want to widen to, returns MVT::Other When and where to widen is target dependent based on the cost of scalarizing vs using the wider vector type.

Reimplemented in llvm::X86TargetLowering.

Definition at line 676 of file TargetLowering.cpp.

References isTypeLegal(), llvm::MVT::isVector(), and llvm::MVT::Other.

legal_fpimm_iterator llvm::TargetLowering::legal_fpimm_begin ( ) const [inline]

Definition at line 307 of file TargetLowering.h.

legal_fpimm_iterator llvm::TargetLowering::legal_fpimm_end ( ) const [inline]

Definition at line 310 of file TargetLowering.h.

virtual bool llvm::TargetLowering::isShuffleMaskLegal	(	SDValue	Mask,
		MVT	VT
	)			const `[inline, virtual]`

isShuffleMaskLegal - Targets can use this to indicate that they only support *some* VECTOR_SHUFFLE operations, those with specific masks. By default, if a target supports the VECTOR_SHUFFLE node, all mask values are assumed to be legal.

Reimplemented in llvm::X86TargetLowering.

Definition at line 318 of file TargetLowering.h.

virtual bool llvm::TargetLowering::isVectorClearMaskLegal	(	const std::vector< SDValue > &	BVOps,
		MVT	EVT,
		SelectionDAG &	DAG
	)			const `[inline, virtual]`

isVectorClearMaskLegal - Similar to isShuffleMaskLegal. This is used by Targets can use this to indicate if there is a suitable VECTOR_SHUFFLE that can be used to replace a VAND with a constant pool entry.

Reimplemented in llvm::X86TargetLowering.

Definition at line 326 of file TargetLowering.h.

LegalizeAction llvm::TargetLowering::getOperationAction	(	unsigned	Op,
		MVT	VT
	)			const `[inline]`

getOperationAction - Return how this operation should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 336 of file TargetLowering.h.

References llvm::array_lengthof(), Expand, llvm::MVT::getSimpleVT(), and llvm::MVT::isExtended().

Referenced by getTypeToPromoteTo(), isOperationLegal(), and isOperationLegalOrCustom().

bool llvm::TargetLowering::isOperationLegalOrCustom	(	unsigned	Op,
		MVT	VT
	)			const `[inline]`

isOperationLegalOrCustom - Return true if the specified operation is legal on this target or can be made legal with custom lowering. This is used to help guide high-level lowering decisions.

Definition at line 347 of file TargetLowering.h.

References Custom, getOperationAction(), isTypeLegal(), Legal, and llvm::MVT::Other.

Referenced by areJTsAllowed(), BuildSDIV(), and BuildUDIV().

bool llvm::TargetLowering::isOperationLegal	(	unsigned	Op,
		MVT	VT
	)			const `[inline]`

isOperationLegal - Return true if the specified operation is legal on this target.

Definition at line 355 of file TargetLowering.h.

References getOperationAction(), isTypeLegal(), Legal, and llvm::MVT::Other.

Referenced by SimplifyDemandedBits().

LegalizeAction llvm::TargetLowering::getLoadExtAction	(	unsigned	LType,
		MVT	VT
	)			const `[inline]`

getLoadExtAction - Return how this load with extension should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 364 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by isLoadExtLegal().

bool llvm::TargetLowering::isLoadExtLegal	(	unsigned	LType,
		MVT	VT
	)			const `[inline]`

isLoadExtLegal - Return true if the specified load with extension is legal on this target.

Definition at line 373 of file TargetLowering.h.

References Custom, getLoadExtAction(), llvm::MVT::isSimple(), and Legal.

Referenced by ExpandConstantFP().

LegalizeAction llvm::TargetLowering::getTruncStoreAction	(	MVT	ValVT,
		MVT	MemVT
	)			const `[inline]`

getTruncStoreAction - Return how this store with truncation should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 383 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by isTruncStoreLegal().

bool llvm::TargetLowering::isTruncStoreLegal	(	MVT	ValVT,
		MVT	MemVT
	)			const `[inline]`

isTruncStoreLegal - Return true if the specified store with truncation is legal on this target.

Definition at line 394 of file TargetLowering.h.

References Custom, getTruncStoreAction(), llvm::MVT::isSimple(), isTypeLegal(), and Legal.

LegalizeAction llvm::TargetLowering::getIndexedLoadAction	(	unsigned	IdxMode,
		MVT	VT
	)			const `[inline]`

getIndexedLoadAction - Return how the indexed load should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 405 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by isIndexedLoadLegal().

bool llvm::TargetLowering::isIndexedLoadLegal	(	unsigned	IdxMode,
		MVT	VT
	)			const `[inline]`

isIndexedLoadLegal - Return true if the specified indexed load is legal on this target.

Definition at line 415 of file TargetLowering.h.

References Custom, getIndexedLoadAction(), llvm::MVT::isSimple(), and Legal.

LegalizeAction llvm::TargetLowering::getIndexedStoreAction	(	unsigned	IdxMode,
		MVT	VT
	)			const `[inline]`

getIndexedStoreAction - Return how the indexed store should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 426 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by isIndexedStoreLegal().

bool llvm::TargetLowering::isIndexedStoreLegal	(	unsigned	IdxMode,
		MVT	VT
	)			const `[inline]`

isIndexedStoreLegal - Return true if the specified indexed load is legal on this target.

Definition at line 436 of file TargetLowering.h.

References Custom, getIndexedStoreAction(), llvm::MVT::isSimple(), and Legal.

LegalizeAction llvm::TargetLowering::getConvertAction	(	MVT	FromVT,
		MVT	ToVT
	)			const `[inline]`

getConvertAction - Return how the conversion should be treated: either it is legal, needs to be promoted to a larger size, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 447 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by isConvertLegal().

bool llvm::TargetLowering::isConvertLegal	(	MVT	FromVT,
		MVT	ToVT
	)			const `[inline]`

isConvertLegal - Return true if the specified conversion is legal on this target.

Definition at line 457 of file TargetLowering.h.

References Custom, getConvertAction(), isTypeLegal(), and Legal.

LegalizeAction llvm::TargetLowering::getCondCodeAction	(	ISD::CondCode	CC,
		MVT	VT
	)			const `[inline]`

getCondCodeAction - Return how the condition code should be treated: either it is legal, needs to be expanded to some other code sequence, or the target has a custom expander for it.

Definition at line 467 of file TargetLowering.h.

References Action, llvm::array_lengthof(), llvm::MVT::getSimpleVT(), and Promote.

Referenced by isCondCodeLegal().

bool llvm::TargetLowering::isCondCodeLegal	(	ISD::CondCode	CC,
		MVT	VT
	)			const `[inline]`

isCondCodeLegal - Return true if the specified condition code is legal on this target.

Definition at line 479 of file TargetLowering.h.

References Custom, getCondCodeAction(), and Legal.

Referenced by combineSelectAndUse().

MVT llvm::TargetLowering::getTypeToPromoteTo	(	unsigned	Op,
		MVT	VT
	)			const `[inline]`

getTypeToPromoteTo - If the action for this operation is to promote, this method returns the ValueType to promote to.

Definition at line 487 of file TargetLowering.h.

References getOperationAction(), llvm::MVT::getSimpleVT(), llvm::MVT::isFloatingPoint(), llvm::MVT::isInteger(), isTypeLegal(), llvm::MVT::isVoid, and Promote.

MVT llvm::TargetLowering::getValueType	(	const Type *	Ty,
		bool	AllowUnknown = `false`
	)			const `[inline]`

getValueType - Return the MVT corresponding to this LLVM type. This is fixed by the LLVM operations except for the pointer size. If AllowUnknown is true, this will return MVT::Other for types with no MVT counterpart (e.g. structs), otherwise it will assert.

Definition at line 514 of file TargetLowering.h.

References llvm::MVT::getMVT(), llvm::MVT::iPTR, and VT.

Referenced by ComputeValueVTs(), llvm::SDISelAsmOperandInfo::getCallOperandValMVT(), llvm::FastISel::getRegForValue(), getSetCCResultType(), llvm::SelectionDAGLowering::getValue(), llvm::XCoreTargetLowering::isLegalAddressingMode(), llvm::ARMTargetLowering::isLegalAddressingMode(), llvm::SparcTargetLowering::LowerArguments(), LowerArguments(), llvm::IA64TargetLowering::LowerArguments(), llvm::IA64TargetLowering::LowerCallTo(), llvm::AlphaTargetLowering::LowerCallTo(), OptimizeNoopCopyExpression(), llvm::FastISel::SelectOperator(), and TargetLowering().

unsigned TargetLowering::getByValTypeAlignment ( const Type * Ty ) const [virtual]

getByValTypeAlignment - Return the desired alignment for ByVal aggregate function arguments in the caller parameter area. This is the actual alignment, not its logarithm.

Reimplemented in llvm::PPCTargetLowering, and llvm::X86TargetLowering.

Definition at line 688 of file TargetLowering.cpp.

References llvm::TargetData::getCallFrameTypeAlignment().

Referenced by LowerArguments(), and LowerCallTo().

MVT llvm::TargetLowering::getRegisterType ( MVT VT ) const [inline]

getRegisterType - Return the type of registers that this ValueType will eventually require.

Definition at line 526 of file TargetLowering.h.

References llvm::array_lengthof(), llvm::MVT::getSimpleVT(), getTypeToTransformTo(), getVectorTypeBreakdown(), llvm::MVT::isInteger(), llvm::MVT::isSimple(), and llvm::MVT::isVector().

Referenced by llvm::FunctionLoweringInfo::CreateRegForValue(), ExpandUnalignedLoad(), ExpandUnalignedStore(), getNumRegisters(), LowerArguments(), LowerCallTo(), and llvm::RegsForValue::RegsForValue().

unsigned llvm::TargetLowering::getNumRegisters ( MVT VT ) const [inline]

getNumRegisters - Return the number of registers that this ValueType will eventually require. This is one for any types promoted to live in larger registers, but may be more than one for types (like i64) that are split into pieces. For types like i140, which are first promoted then expanded, it is the number of registers needed to hold all the bits of the original type. For an i140 on a 32 bit machine this means 5 registers.

Definition at line 550 of file TargetLowering.h.

References llvm::array_lengthof(), getRegisterType(), llvm::MVT::getSimpleVT(), llvm::MVT::getSizeInBits(), getVectorTypeBreakdown(), llvm::MVT::isInteger(), llvm::MVT::isSimple(), and llvm::MVT::isVector().

Referenced by llvm::RegsForValue::AddInlineAsmOperands(), llvm::FunctionLoweringInfo::CreateRegForValue(), llvm::RegsForValue::getCopyFromRegs(), llvm::RegsForValue::getCopyToRegs(), llvm::SelectionDAGLowering::GetRegistersForValue(), LowerArguments(), LowerCallTo(), llvm::RegsForValue::RegsForValue(), and llvm::FunctionLoweringInfo::set().

virtual bool llvm::TargetLowering::ShouldShrinkFPConstant ( MVT VT ) const [inline, virtual]

ShouldShrinkFPConstant - If true, then instruction selection should seek to shrink the FP constant of the specified type to a smaller type in order to save space and / or reduce runtime.

Reimplemented in llvm::X86TargetLowering.

Definition at line 572 of file TargetLowering.h.

Referenced by ExpandConstantFP().

bool llvm::TargetLowering::hasTargetDAGCombine ( ISD::NodeType NT ) const [inline]

hasTargetDAGCombine - If true, the target has custom DAG combine transformations that it can perform for the specified node.

Definition at line 576 of file TargetLowering.h.

References llvm::array_lengthof().

unsigned llvm::TargetLowering::getMaxStoresPerMemset ( ) const [inline]

Get maximum # of store operations permitted for llvm.memset.

This function returns the maximum number of store operations permitted to replace a call to llvm.memset. The value is set by the target at the performance threshold for such a replacement.

Definition at line 585 of file TargetLowering.h.

References maxStoresPerMemset.

Referenced by getMemsetStores().

unsigned llvm::TargetLowering::getMaxStoresPerMemcpy ( ) const [inline]

Get maximum # of store operations permitted for llvm.memcpy.

This function returns the maximum number of store operations permitted to replace a call to llvm.memcpy. The value is set by the target at the performance threshold for such a replacement.

Definition at line 591 of file TargetLowering.h.

References maxStoresPerMemcpy.

Referenced by getMemcpyLoadsAndStores().

unsigned llvm::TargetLowering::getMaxStoresPerMemmove ( ) const [inline]

Get maximum # of store operations permitted for llvm.memmove.

This function returns the maximum number of store operations permitted to replace a call to llvm.memmove. The value is set by the target at the performance threshold for such a replacement.

Definition at line 597 of file TargetLowering.h.

References maxStoresPerMemmove.

Referenced by getMemmoveLoadsAndStores().

bool llvm::TargetLowering::allowsUnalignedMemoryAccesses ( ) const [inline]

Determine if the target supports unaligned memory accesses.

This function returns true if the target allows unaligned memory accesses. This is used, for example, in situations where an array copy/move/set is converted to a sequence of store operations. It's use helps to ensure that such replacements don't generate code that causes an alignment error (trap) on the target machine.

Definition at line 605 of file TargetLowering.h.

References allowUnalignedMemoryAccesses.

Referenced by MeetsMaxMemopRequirement().

virtual MVT llvm::TargetLowering::getOptimalMemOpType	(	uint64_t	Size,
		unsigned	Align,
		bool	isSrcConst,
		bool	isSrcStr
	)			const `[inline, virtual]`

getOptimalMemOpType - Returns the target specific optimal type for load and store operations as a result of memset, memcpy, and memmove lowering. It returns MVT::iAny if SelectionDAG should be responsible for determining it.

Reimplemented in llvm::X86TargetLowering.

Definition at line 613 of file TargetLowering.h.

References llvm::MVT::iAny.

Referenced by MeetsMaxMemopRequirement().

bool llvm::TargetLowering::usesUnderscoreSetJmp ( ) const [inline]

usesUnderscoreSetJmp - Determine if we should use _setjmp or setjmp to implement llvm.setjmp.

Definition at line 620 of file TargetLowering.h.

bool llvm::TargetLowering::usesUnderscoreLongJmp ( ) const [inline]

usesUnderscoreLongJmp - Determine if we should use _longjmp or longjmp to implement llvm.longjmp.

Definition at line 626 of file TargetLowering.h.

unsigned llvm::TargetLowering::getStackPointerRegisterToSaveRestore ( ) const [inline]

getStackPointerRegisterToSaveRestore - If a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save and restore.

Definition at line 633 of file TargetLowering.h.

unsigned llvm::TargetLowering::getExceptionAddressRegister ( ) const [inline]

getExceptionAddressRegister - If a physical register, this returns the register that receives the exception address on entry to a landing pad.

Definition at line 640 of file TargetLowering.h.

unsigned llvm::TargetLowering::getExceptionSelectorRegister ( ) const [inline]

getExceptionSelectorRegister - If a physical register, this returns the register that receives the exception typeid on entry to a landing pad.

Definition at line 647 of file TargetLowering.h.

unsigned llvm::TargetLowering::getJumpBufSize ( ) const [inline]

getJumpBufSize - returns the target's jmp_buf size in bytes (if never set, the default is 200)

Definition at line 653 of file TargetLowering.h.

unsigned llvm::TargetLowering::getJumpBufAlignment ( ) const [inline]

getJumpBufAlignment - returns the target's jmp_buf alignment in bytes (if never set, the default is 0)

Definition at line 659 of file TargetLowering.h.

unsigned llvm::TargetLowering::getIfCvtBlockSizeLimit ( ) const [inline]

getIfCvtBlockLimit - returns the target specific if-conversion block size limit. Any block whose size is greater should not be predicated.

Definition at line 665 of file TargetLowering.h.

unsigned llvm::TargetLowering::getIfCvtDupBlockSizeLimit ( ) const [inline]

getIfCvtDupBlockLimit - returns the target specific size limit for a block to be considered for duplication. Any block whose size is greater should not be duplicated to facilitate its predication.

Definition at line 672 of file TargetLowering.h.

unsigned llvm::TargetLowering::getPrefLoopAlignment ( ) const [inline]

getPrefLoopAlignment - return the preferred loop alignment.

Definition at line 678 of file TargetLowering.h.

virtual bool llvm::TargetLowering::getPreIndexedAddressParts	(	SDNode *	N,
		SDValue &	Base,
		SDValue &	Offset,
		ISD::MemIndexedMode &	AM,
		SelectionDAG &	DAG
	)			const `[inline, virtual]`

getPreIndexedAddressParts - returns true by value, base pointer and offset pointer and addressing mode by reference if the node's address can be legally represented as pre-indexed load / store address.

Reimplemented in llvm::ARMTargetLowering, and llvm::PPCTargetLowering.

Definition at line 685 of file TargetLowering.h.

virtual bool llvm::TargetLowering::getPostIndexedAddressParts	(	SDNode *	N,
		SDNode *	Op,
		SDValue &	Base,
		SDValue &	Offset,
		ISD::MemIndexedMode &	AM,
		SelectionDAG &	DAG
	)			const `[inline, virtual]`

getPostIndexedAddressParts - returns true by value, base pointer and offset pointer and addressing mode by reference if this node can be combined with a load / store to form a post-indexed load / store.

Reimplemented in llvm::ARMTargetLowering.

Definition at line 695 of file TargetLowering.h.

SDValue TargetLowering::getPICJumpTableRelocBase	(	SDValue	Table,
		SelectionDAG &	DAG
	)			const `[virtual]`

getPICJumpTableRelocaBase - Returns relocation base for the given PIC jumptable.

Reimplemented in llvm::X86TargetLowering.

Definition at line 692 of file TargetLowering.cpp.

References llvm::SelectionDAG::getNode(), getPointerTy(), llvm::ISD::GLOBAL_OFFSET_TABLE, and usesGlobalOffsetTable().

bool TargetLowering::isOffsetFoldingLegal ( const GlobalAddressSDNode * GA ) const [virtual]

isOffsetFoldingLegal - Return true if folding a constant offset with the given GlobalAddress is legal. It is frequently not legal in PIC relocation models.

Reimplemented in llvm::AlphaTargetLowering, llvm::SPUTargetLowering, llvm::PPCTargetLowering, and llvm::SparcTargetLowering.

Definition at line 700 of file TargetLowering.cpp.

References llvm::Reloc::DynamicNoPIC, llvm::GlobalAddressSDNode::getGlobal(), getTargetMachine(), llvm::GlobalValue::isDeclaration(), llvm::GlobalValue::mayBeOverridden(), and llvm::Reloc::Static.

bool TargetLowering::SimplifyDemandedBits	(	SDValue	Op,
		const APInt &	DemandedMask,
		APInt &	KnownZero,
		APInt &	KnownOne,
		TargetLoweringOpt &	TLO,
		unsigned	Depth = `0`
	)			const

SimplifyDemandedBits - Look at Op. At this point, we know that only the DemandedMask bits of the result of Op are ever used downstream. If we can use this information to simplify Op, create a new simplified DAG node and return true, returning the original and new nodes in Old and New. Otherwise, analyze the expression and return a mask of KnownOne and KnownZero bits for the expression (used to simplify the caller). The KnownZero/One bits may only be accurate for those bits in the DemandedMask.

Definition at line 753 of file TargetLowering.cpp.

References llvm::ISD::AND, llvm::ISD::ANY_EXTEND, llvm::ISD::AssertZext, llvm::ISD::BIT_CONVERT, llvm::CallingConv::C, llvm::TargetLowering::TargetLoweringOpt::CombineTo(), llvm::SelectionDAG::ComputeMaskedBits(), llvm::ISD::Constant, llvm::TargetLowering::TargetLoweringOpt::DAG, llvm::ISD::FGETSIGN, llvm::APInt::getAllOnesValue(), llvm::APInt::getBitsSet(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getConstant(), llvm::SDNode::getDebugLoc(), llvm::APInt::getHighBitsSet(), llvm::APInt::getLowBitsSet(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNode(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), getShiftAmountTy(), llvm::APInt::getSignBit(), llvm::MVT::getSizeInBits(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::hasOneUse(), llvm::APInt::intersects(), llvm::APInt::isAllOnesValue(), llvm::MVT::isFloatingPoint(), isOperationLegal(), llvm::MVT::isVector(), llvm::APInt::lshr(), llvm::ISD::OR, llvm::ISD::SELECT, llvm::ISD::SELECT_CC, llvm::ISD::SHL, llvm::TargetLowering::TargetLoweringOpt::ShrinkDemandedConstant(), llvm::ISD::SIGN_EXTEND, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRA, llvm::ISD::SRL, llvm::APInt::trunc(), llvm::ISD::TRUNCATE, llvm::ISD::UNDEF, VT, llvm::ISD::XOR, llvm::ISD::ZERO_EXTEND, and llvm::APInt::zext().

Referenced by PerformBTCombine().

void TargetLowering::computeMaskedBitsForTargetNode	(	const SDValue	Op,
		const APInt &	Mask,
		APInt &	KnownZero,
		APInt &	KnownOne,
		const SelectionDAG &	DAG,
		unsigned	Depth = `0`
	)			const `[virtual]`

computeMaskedBitsForTargetNode - Determine which of the bits specified in Mask are known to be either zero or one and return them in the KnownZero/KnownOne bitsets.

Reimplemented in llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, and llvm::X86TargetLowering.

Definition at line 1320 of file TargetLowering.cpp.

References llvm::ISD::BUILTIN_OP_END, llvm::APInt::getBitWidth(), llvm::SDValue::getOpcode(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, and llvm::ISD::INTRINSIC_WO_CHAIN.

Referenced by llvm::SelectionDAG::ComputeMaskedBits().

unsigned TargetLowering::ComputeNumSignBitsForTargetNode	(	SDValue	Op,
		unsigned	Depth = `0`
	)			const `[virtual]`

ComputeNumSignBitsForTargetNode - This method can be implemented by targets that want to expose additional information about sign bits to the DAG Combiner.

Reimplemented in llvm::SPUTargetLowering.

Definition at line 1338 of file TargetLowering.cpp.

References llvm::ISD::BUILTIN_OP_END, llvm::SDValue::getOpcode(), llvm::ISD::INTRINSIC_VOID, llvm::ISD::INTRINSIC_W_CHAIN, and llvm::ISD::INTRINSIC_WO_CHAIN.

Referenced by llvm::SelectionDAG::ComputeNumSignBits().

SDValue TargetLowering::SimplifySetCC	(	MVT	VT,
		SDValue	N0,
		SDValue	N1,
		ISD::CondCode	Cond,
		bool	foldBooleans,
		DAGCombinerInfo &	DCI,
		DebugLoc	dl
	)			const

SimplifySetCC - Try to simplify a setcc built with the specified operands and cc. If it is unable to simplify it, return a null SDValue.

Definition at line 1369 of file TargetLowering.cpp.

References llvm::ISD::ADD, llvm::TargetLowering::DAGCombinerInfo::AddToWorklist(), llvm::ISD::AND, llvm::ISD::Constant, llvm::ISD::CTLZ, llvm::TargetLowering::DAGCombinerInfo::DAG, DAG, llvm::SelectionDAG::FoldSetCC(), llvm::MemSDNode::getAlignment(), llvm::APInt::getAllOnesValue(), llvm::LoadSDNode::getBasePtr(), llvm::MemSDNode::getChain(), llvm::SelectionDAG::getConstant(), llvm::LoadSDNode::getExtensionType(), llvm::APInt::getHighBitsSet(), llvm::MVT::getIntegerVT(), llvm::SelectionDAG::getLoad(), llvm::APInt::getLowBitsSet(), llvm::APInt::getMaxValue(), llvm::MemSDNode::getMemoryVT(), llvm::APInt::getMinValue(), llvm::SelectionDAG::getNode(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNOT(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::SDValue::getOperand(), getPointerTy(), llvm::SelectionDAG::getSetCC(), llvm::ISD::getSetCCInverse(), llvm::ISD::getSetCCSwappedOperands(), getShiftAmountTy(), llvm::APInt::getSignedMaxValue(), llvm::APInt::getSignedMinValue(), llvm::MVT::getSizeInBits(), llvm::MemSDNode::getSrcValue(), llvm::MemSDNode::getSrcValueOffset(), llvm::ISD::getUnorderedFlavor(), llvm::SDValue::getValueSizeInBits(), llvm::SDValue::getValueType(), llvm::SDNode::hasOneUse(), llvm::MVT::i1, Imm, llvm::TargetLowering::DAGCombinerInfo::isBeforeLegalize(), llvm::TargetLowering::DAGCombinerInfo::isCalledByLegalizer(), llvm::SelectionDAG::isCommutativeBinOp(), llvm::MVT::isInteger(), llvm::TargetData::isLittleEndian(), llvm::isPowerOf2_64(), llvm::MVT::isRound(), llvm::ISD::isSignedIntSetCC(), llvm::ISD::isTrueWhenEqual(), llvm::LSBaseSDNode::isUnindexed(), llvm::MemSDNode::isVolatile(), llvm::Log2_32(), llvm::Log2_64(), Mask, llvm::SelectionDAG::MaskedValueIsZero(), llvm::MinAlign(), llvm::ISD::NON_EXTLOAD, offset, llvm::ISD::OR, llvm::ISD::SETCC, llvm::ISD::SETEQ, llvm::ISD::SETFALSE, llvm::ISD::SETFALSE2, llvm::ISD::SETGE, llvm::ISD::SETGT, llvm::ISD::SETLE, llvm::ISD::SETLT, llvm::ISD::SETNE, llvm::ISD::SETO, llvm::ISD::SETTRUE, llvm::ISD::SETTRUE2, llvm::ISD::SETUGE, llvm::ISD::SETUGT, llvm::ISD::SETULE, llvm::ISD::SETULT, llvm::ISD::SETUO, llvm::ISD::SHL, llvm::ISD::SIGN_EXTEND_INREG, llvm::ISD::SRL, llvm::ISD::SUB, llvm::ISD::SUBC, llvm::ISD::UNDEF, Val, ValueHasExactlyOneBitSet(), llvm::ISD::XOR, and llvm::ISD::ZERO_EXTEND.

bool TargetLowering::isGAPlusOffset	(	SDNode *	N,
		GlobalValue *&	GA,
		int64_t &	Offset
	)			const `[virtual]`

isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the node is a GlobalAddress + offset.

Reimplemented in llvm::X86TargetLowering.

Definition at line 1913 of file TargetLowering.cpp.

References llvm::ISD::ADD, llvm::dyn_cast(), llvm::GlobalAddressSDNode::getGlobal(), llvm::SDValue::getNode(), llvm::GlobalAddressSDNode::getOffset(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), llvm::ConstantSDNode::getSExtValue(), and V.

Referenced by isBaseAlignmentOfN(), isConsecutiveLoad(), and llvm::X86TargetLowering::isGAPlusOffset().

bool TargetLowering::isConsecutiveLoad	(	SDNode *	LD,
		SDNode *	Base,
		unsigned	Bytes,
		int	Dist,
		const MachineFrameInfo *	MFI
	)			const

isConsecutiveLoad - Return true if LD (which must be a LoadSDNode) is loading 'Bytes' bytes from a location that is 'Dist' units away from the location that the 'Base' load is loading from.

Definition at line 1946 of file TargetLowering.cpp.

References FI, llvm::ISD::FrameIndex, llvm::X86II::FS, llvm::SDValue::getNode(), llvm::MachineFrameInfo::getObjectOffset(), llvm::MachineFrameInfo::getObjectSize(), llvm::SDValue::getOpcode(), llvm::SDNode::getOperand(), llvm::MVT::getSizeInBits(), llvm::SDNode::getValueType(), isGAPlusOffset(), and VT.

Referenced by EltsFromConsecutiveLoads().

SDValue TargetLowering::PerformDAGCombine	(	SDNode *	N,
		DAGCombinerInfo &	DCI
	)			const `[virtual]`

PerformDAGCombine - This method will be invoked for all target nodes and for any target-independent nodes that the target has registered with invoke it for.

The semantics are as follows: Return Value: SDValue.Val == 0 - No change was made SDValue.Val == N - N was replaced, is dead, and is already handled. otherwise - N should be replaced by the returned Operand.

In addition, methods provided by DAGCombinerInfo may be used to perform more complex transformations.

Reimplemented in llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, and llvm::X86TargetLowering.

Definition at line 1981 of file TargetLowering.cpp.

void llvm::TargetLowering::setUsesGlobalOffsetTable ( bool V ) [inline, protected]

setUsesGlobalOffsetTable - Specify that this target does or doesn't use a GOT for PC-relative code.

Definition at line 828 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), and llvm::MipsTargetLowering::MipsTargetLowering().

void llvm::TargetLowering::setShiftAmountType ( MVT VT ) [inline, protected]

setShiftAmountType - Describe the type that should be used for shift amounts. This type defaults to the pointer type.

Definition at line 832 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setBooleanContents ( BooleanContent Ty ) [inline, protected]

setBooleanContents - Specify how the target extends the result of a boolean value from i1 to a wider type. See getBooleanContents.

Definition at line 836 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setSchedulingPreference ( SchedPreference Pref ) [inline, protected]

setSchedulingPreference - Specify the target scheduling preference.

Definition at line 839 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setShiftAmountFlavor ( OutOfRangeShiftAmount OORSA ) [inline, protected]

setShiftAmountFlavor - Describe how the target handles out of range shift amounts.

Definition at line 845 of file TargetLowering.h.

Referenced by llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setUseUnderscoreSetJmp ( bool Val ) [inline, protected]

setUseUnderscoreSetJmp - Indicate whether this target prefers to use _setjmp to implement llvm.setjmp or the non _ version. Defaults to false.

Definition at line 852 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setUseUnderscoreLongJmp ( bool Val ) [inline, protected]

setUseUnderscoreLongJmp - Indicate whether this target prefers to use _longjmp to implement llvm.longjmp or the non _ version. Defaults to false.

Definition at line 859 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setStackPointerRegisterToSaveRestore ( unsigned R ) [inline, protected]

setStackPointerRegisterToSaveRestore - If set to a physical register, this specifies the register that llvm.savestack/llvm.restorestack should save and restore.

Definition at line 866 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setExceptionPointerRegister ( unsigned R ) [inline, protected]

setExceptionPointerRegister - If set to a physical register, this sets the register that receives the exception address on entry to a landing pad.

Definition at line 873 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setExceptionSelectorRegister ( unsigned R ) [inline, protected]

setExceptionSelectorRegister - If set to a physical register, this sets the register that receives the exception typeid on entry to a landing pad.

Definition at line 880 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setSelectIsExpensive ( ) [inline, protected]

SelectIsExpensive - Tells the code generator not to expand operations into sequences that use the select operations if possible.

Definition at line 886 of file TargetLowering.h.

void llvm::TargetLowering::setIntDivIsCheap ( bool isCheap = true ) [inline, protected]

setIntDivIsCheap - Tells the code generator that integer divide is expensive, and if possible, should be replaced by an alternate sequence of instructions not containing an integer divide.

Definition at line 891 of file TargetLowering.h.

Referenced by llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setPow2DivIsCheap ( bool isCheap = true ) [inline, protected]

setPow2DivIsCheap - Tells the code generator that it shouldn't generate srl/add/sra for a signed divide by power of two, and let the target handle it.

Definition at line 896 of file TargetLowering.h.

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::SPUTargetLowering::SPUTargetLowering().

void llvm::TargetLowering::addRegisterClass	(	MVT	VT,
		TargetRegisterClass *	RC
	)			`[inline, protected]`

addRegisterClass - Add the specified register class as an available regclass for the specified value type. This indicates the selector can handle values of that class natively.

Definition at line 901 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void TargetLowering::computeRegisterProperties ( ) [protected]

computeRegisterProperties - Once all of the register classes are added, this allows us to compute derived properties we expose.

Definition at line 488 of file TargetLowering.cpp.

References Expand, llvm::MVT::f32, llvm::MVT::f64, llvm::MVT::FIRST_VECTOR_VALUETYPE, llvm::MVT::getPow2VectorType(), llvm::MVT::getVectorElementType(), llvm::MVT::getVectorNumElements(), getVectorTypeBreakdown(), llvm::MVT::i1, llvm::MVT::i32, llvm::MVT::i64, llvm::MVT::isInteger(), isTypeLegal(), llvm::MVT::isVoid, llvm::MVT::LAST_INTEGER_VALUETYPE, llvm::MVT::LAST_VALUETYPE, llvm::MVT::LAST_VECTOR_VALUETYPE, llvm::MVT::Other, llvm::MVT::ppcf128, Promote, llvm::TargetLowering::ValueTypeActionImpl::setTypeAction(), and VT.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setOperationAction	(	unsigned	Op,
		MVT	VT,
		LegalizeAction	Action
	)			`[inline, protected]`

setOperationAction - Indicate that the specified operation does not work with the specified type and indicate what to do about it.

Definition at line 913 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

void llvm::TargetLowering::setLoadExtAction	(	unsigned	ExtType,
		MVT	VT,
		LegalizeAction	Action
	)			`[inline, protected]`

setLoadExtAction - Indicate that the specified load with extension does not work with the with specified type and indicate what to do about it.

Definition at line 923 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::ARMTargetLowering::ARMTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), llvm::X86TargetLowering::X86TargetLowering(), and llvm::XCoreTargetLowering::XCoreTargetLowering().

void llvm::TargetLowering::setTruncStoreAction	(	MVT	ValVT,
		MVT	MemVT,
		LegalizeAction	Action
	)			`[inline, protected]`

setTruncStoreAction - Indicate that the specified truncating store does not work with the with specified type and indicate what to do about it.

Definition at line 934 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SparcTargetLowering::SparcTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setIndexedLoadAction	(	unsigned	IdxMode,
		MVT	VT,
		LegalizeAction	Action
	)			`[inline, protected]`

setIndexedLoadAction - Indicate that the specified indexed load does or does not work with the with specified type and indicate what to do abort it. NOTE: All indexed mode loads are initialized to Expand in TargetLowering.cpp

Definition at line 949 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and TargetLowering().

void llvm::TargetLowering::setIndexedStoreAction	(	unsigned	IdxMode,
		MVT	VT,
		LegalizeAction	Action
	)			`[inline, protected]`

setIndexedStoreAction - Indicate that the specified indexed store does or does not work with the with specified type and indicate what to do about it. NOTE: All indexed mode stores are initialized to Expand in TargetLowering.cpp

Definition at line 962 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and TargetLowering().

void llvm::TargetLowering::setConvertAction	(	MVT	FromVT,
		MVT	ToVT,
		LegalizeAction	Action
	)			`[inline, protected]`

setConvertAction - Indicate that the specified conversion does or does not work with the with specified type and indicate what to do about it.

Definition at line 973 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setCondCodeAction	(	ISD::CondCode	CC,
		MVT	VT,
		LegalizeAction	Action
	)			`[inline, protected]`

setCondCodeAction - Indicate that the specified condition code is or isn't supported on the target and indicate what to do about it.

Definition at line 986 of file TargetLowering.h.

References llvm::array_lengthof(), and llvm::MVT::getSimpleVT().

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::AddPromotedToType	(	unsigned	Opc,
		MVT	OrigVT,
		MVT	DestVT
	)			`[inline, protected]`

AddPromotedToType - If Opc/OrigVT is specified as being promoted, the promotion code defaults to trying a larger integer/fp until it can find one that works. If that default is insufficient, this method can be used by the target to override the default.

Definition at line 998 of file TargetLowering.h.

References llvm::MVT::getSimpleVT().

Referenced by llvm::MipsTargetLowering::MipsTargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::addLegalFPImmediate ( const APFloat & Imm ) [inline, protected]

addLegalFPImmediate - Indicate that this target can instruction select the specified FP immediate natively.

Definition at line 1005 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), llvm::IA64TargetLowering::IA64TargetLowering(), llvm::MipsTargetLowering::MipsTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setTargetDAGCombine ( ISD::NodeType NT ) [inline, protected]

setTargetDAGCombine - Targets should invoke this method for each target independent node that they want to provide a custom DAG combiner for by implementing the PerformDAGCombine virtual method.

Definition at line 1012 of file TargetLowering.h.

References llvm::array_lengthof().

Referenced by llvm::PPCTargetLowering::PPCTargetLowering(), llvm::SPUTargetLowering::SPUTargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

void llvm::TargetLowering::setJumpBufSize ( unsigned Size ) [inline, protected]

setJumpBufSize - Set the target's required jmp_buf buffer size (in bytes); default is 200

Definition at line 1019 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), and llvm::IA64TargetLowering::IA64TargetLowering().

void llvm::TargetLowering::setJumpBufAlignment ( unsigned Align ) [inline, protected]

setJumpBufAlignment - Set the target's required jmp_buf buffer alignment (in bytes); default is 0

Definition at line 1025 of file TargetLowering.h.

Referenced by llvm::AlphaTargetLowering::AlphaTargetLowering(), and llvm::IA64TargetLowering::IA64TargetLowering().

void llvm::TargetLowering::setIfCvtBlockSizeLimit ( unsigned Limit ) [inline, protected]

setIfCvtBlockSizeLimit - Set the target's if-conversion block size limit (in number of instructions); default is 2.

Definition at line 1031 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

void llvm::TargetLowering::setIfCvtDupBlockSizeLimit ( unsigned Limit ) [inline, protected]

setIfCvtDupBlockSizeLimit - Set the target's block size limit (in number of instructions) to be considered for code duplication during if-conversion; default is 2.

Definition at line 1038 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

void llvm::TargetLowering::setPrefLoopAlignment ( unsigned Align ) [inline, protected]

setPrefLoopAlignment - Set the target's preferred loop alignment. Default alignment is zero, it means the target does not care about loop alignment.

Definition at line 1044 of file TargetLowering.h.

Referenced by llvm::X86TargetLowering::X86TargetLowering().

virtual const TargetSubtarget* llvm::TargetLowering::getSubtarget ( ) [inline, virtual]

Reimplemented in llvm::ARMTargetLowering, and llvm::X86TargetLowering.

Definition at line 1050 of file TargetLowering.h.

void TargetLowering::LowerArguments	(	Function &	F,
		SelectionDAG &	DAG,
		SmallVectorImpl< SDValue > &	ArgValues,
		DebugLoc	dl
	)			`[virtual]`

LowerArguments - This hook must be implemented to indicate how we should lower the arguments for the specified function, into the specified DAG.

TargetLowering::LowerArguments - This is the default LowerArguments implementation, which just inserts a FORMAL_ARGUMENTS node. FIXME: When all targets are migrated to using FORMAL_ARGUMENTS, this hook should be integrated into SDISel.

Reimplemented in llvm::IA64TargetLowering, and llvm::SparcTargetLowering.

Definition at line 5466 of file SelectionDAGBuild.cpp.

std::pair< SDValue, SDValue > TargetLowering::LowerCallTo	(	SDValue	Chain,
		const Type *	RetTy,
		bool	RetSExt,
		bool	RetZExt,
		bool	isVarArg,
		bool	isInreg,
		unsigned	CallingConv,
		bool	isTailCall,
		SDValue	Callee,
		ArgListTy &	Args,
		SelectionDAG &	DAG,
		DebugLoc	dl
	)			`[virtual]`

TargetLowering::LowerCallTo - This is the default LowerCallTo implementation, which just inserts an ISD::CALL node, which is later custom lowered by the target to something concrete. FIXME: When all targets are migrated to using ISD::CALL, this hook should be integrated into SDISel.

Definition at line 5596 of file SelectionDAGBuild.cpp.

References llvm::ISD::ANY_EXTEND, llvm::ISD::AssertSext, llvm::ISD::AssertZext, ComputeValueVTs(), llvm::ISD::DELETED_NODE, E, llvm::SmallVectorImpl< T >::empty(), llvm::TargetData::getABITypeAlignment(), llvm::SelectionDAG::getArgFlags(), getByValTypeAlignment(), llvm::SelectionDAG::getCall(), getCopyFromParts(), getCopyToParts(), llvm::SequentialType::getElementType(), llvm::SelectionDAG::getNode(), getNumRegisters(), getRegisterType(), getTargetData(), llvm::MVT::getTypeForMVT(), llvm::TargetData::getTypePaddedSize(), llvm::SDValue::getValue(), llvm::SelectionDAG::getVTList(), llvm::ISD::MERGE_VALUES, Node, llvm::MVT::Other, llvm::SmallVectorImpl< T >::push_back(), llvm::ISD::ArgFlagsTy::setOrigAlign(), llvm::ISD::ArgFlagsTy::setSplit(), llvm::ISD::SIGN_EXTEND, llvm::SmallVectorImpl< T >::size(), llvm::Type::VoidTy, and llvm::ISD::ZERO_EXTEND.

Referenced by ExpandLibCall(), llvm::SelectionDAG::getMemcpy(), llvm::SelectionDAG::getMemmove(), llvm::SelectionDAG::getMemset(), and llvm::SelectionDAGLowering::LowerCallTo().

virtual SDValue llvm::TargetLowering::EmitTargetCodeForMemcpy	(	SelectionDAG &	DAG,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		unsigned	Align,
		bool	AlwaysInline,
		const Value *	DstSV,
		uint64_t	DstOff,
		const Value *	SrcSV,
		uint64_t	SrcOff
	)			`[inline, virtual]`

EmitTargetCodeForMemcpy - Emit target-specific code that performs a memcpy. This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple loads/stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used.

If AlwaysInline is true, the size is constant and the target should not emit any calls and is strongly encouraged to attempt to emit inline code even if it is beyond the usual threshold because this intrinsic is being expanded in a place where calls are not feasible (e.g. within the prologue for another call). If the target chooses to decline an AlwaysInline request here, legalize will resort to using simple loads and stores.

Definition at line 1104 of file TargetLowering.h.

Referenced by llvm::SelectionDAG::getMemcpy().

virtual SDValue llvm::TargetLowering::EmitTargetCodeForMemmove	(	SelectionDAG &	DAG,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		unsigned	Align,
		const Value *	DstSV,
		uint64_t	DstOff,
		const Value *	SrcSV,
		uint64_t	SrcOff
	)			`[inline, virtual]`

EmitTargetCodeForMemmove - Emit target-specific code that performs a memmove. This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple loads/stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used.

Definition at line 1121 of file TargetLowering.h.

Referenced by llvm::SelectionDAG::getMemmove().

virtual SDValue llvm::TargetLowering::EmitTargetCodeForMemset	(	SelectionDAG &	DAG,
		SDValue	Chain,
		SDValue	Op1,
		SDValue	Op2,
		SDValue	Op3,
		unsigned	Align,
		const Value *	DstSV,
		uint64_t	DstOff
	)			`[inline, virtual]`

EmitTargetCodeForMemset - Emit target-specific code that performs a memset. This can be used by targets to provide code sequences for cases that don't fit the target's parameters for simple stores and can be more efficient than using a library call. This function can return a null SDValue if the target declines to use custom code and a different lowering strategy should be used.

Definition at line 1137 of file TargetLowering.h.

Referenced by llvm::SelectionDAG::getMemset().

void TargetLowering::LowerOperationWrapper	(	SDNode *	N,
		SmallVectorImpl< SDValue > &	Results,
		SelectionDAG &	DAG
	)			`[virtual]`

LowerOperationWrapper - This callback is invoked by the type legalizer to legalize nodes with an illegal operand type but legal result types. It replaces the LowerOperation callback in the type Legalizer. The reason we can not do away with LowerOperation entirely is that LegalizeDAG isn't yet ready to use this callback. TODO: Consider merging with ReplaceNodeResults. The target places new result values for the node in Results (their number and types must exactly match those of the original return values of the node), or leaves Results empty, which indicates that the node is not to be custom lowered after all. The default implementation calls LowerOperation.

Reimplemented in llvm::PIC16TargetLowering.

Definition at line 5732 of file SelectionDAGBuild.cpp.

References llvm::SDValue::getNode(), LowerOperation(), and llvm::SmallVectorImpl< T >::push_back().

SDValue TargetLowering::LowerOperation	(	SDValue	Op,
		SelectionDAG &	DAG
	)			`[virtual]`

LowerOperation - This callback is invoked for operations that are unsupported by the target, which are registered to use 'custom' lowering, and whose defined values are all legal. If the target has no operations that require custom lowering, it need not implement this. The default implementation of this aborts.

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::IA64TargetLowering, llvm::MipsTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, llvm::X86TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 5740 of file SelectionDAGBuild.cpp.

Referenced by LowerArguments(), and LowerOperationWrapper().

virtual void llvm::TargetLowering::ReplaceNodeResults	(	SDNode *	N,
		SmallVectorImpl< SDValue > &	Results,
		SelectionDAG &	DAG
	)			`[inline, virtual]`

ReplaceNodeResults - This callback is invoked when a node result type is illegal for the target, and the operation was registered to use 'custom' lowering for that result type. The target places new result values for the node in Results (their number and types must exactly match those of the original return values of the node), or leaves Results empty, which indicates that the node is not to be custom lowered after all.

If the target has no operations that require custom lowering, it need not implement this. The default implementation aborts.

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, llvm::X86TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 1177 of file TargetLowering.h.

virtual bool llvm::TargetLowering::IsEligibleForTailCallOptimization	(	CallSDNode *	Call,
		SDValue	Ret,
		SelectionDAG &	DAG
	)			const `[inline, virtual]`

IsEligibleForTailCallOptimization - Check whether the call is eligible for tail call optimization. Targets which want to do tail call optimization should override this function.

Reimplemented in llvm::PPCTargetLowering, and llvm::X86TargetLowering.

Definition at line 1185 of file TargetLowering.h.

Referenced by CheckDAGForTailCallsAndFixThem().

static bool llvm::TargetLowering::CheckTailCallReturnConstraints	(	CallSDNode *	TheCall,
		SDValue	Ret
	)			`[inline, static]`

CheckTailCallReturnConstraints - Check whether CALL node immediatly preceeds the RET node and whether the return uses the result of the node or is a void return. This function can be used by the target to determine eligiblity of tail call optimization.

Definition at line 1195 of file TargetLowering.h.

References llvm::SDValue::getNumOperands(), llvm::SDNode::getNumValues(), and llvm::SDValue::getOperand().

Referenced by llvm::X86TargetLowering::IsEligibleForTailCallOptimization(), and llvm::PPCTargetLowering::IsEligibleForTailCallOptimization().

static SDValue llvm::TargetLowering::GetPossiblePreceedingTailCall	(	SDValue	Chain,
		unsigned	TailCallNodeOpCode
	)			`[inline, static]`

GetPossiblePreceedingTailCall - Get preceeding TailCallNodeOpCode node if it exists. Skip a possible ISD::TokenFactor.

Definition at line 1210 of file TargetLowering.h.

References llvm::SDValue::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), and llvm::ISD::TokenFactor.

const char * TargetLowering::getTargetNodeName ( unsigned Opcode ) const [virtual]

getTargetNodeName() - This method returns the name of a target specific DAG node.

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::IA64TargetLowering, llvm::MipsTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, llvm::X86TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 607 of file TargetLowering.cpp.

Referenced by llvm::SDNode::getOperationName().

virtual FastISel* llvm::TargetLowering::createFastISel	(	MachineFunction &	,
		MachineModuleInfo *	,
		DwarfWriter *	,
		DenseMap< const Value *, unsigned > &	,
		DenseMap< const BasicBlock , MachineBasicBlock > &	,
		DenseMap< const AllocaInst *, int > &	,
		SmallSet< Instruction *, 8 > &	CatchInfoLost
	)			`[inline, virtual]`

createFastISel - This method returns a target specific FastISel object, or null if the target does not support "fast" ISel.

Reimplemented in llvm::X86TargetLowering.

Definition at line 1229 of file TargetLowering.h.

void TargetLowering::ComputeConstraintToUse	(	AsmOperandInfo &	OpInfo,
		SDValue	Op,
		bool	hasMemory,
		SelectionDAG *	DAG = `0`
	)			const `[virtual]`

ComputeConstraintToUse - Determines the constraint code and constraint type to use for the specific AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType. If the actual operand being passed in is available, it can be passed in as Op, otherwise an empty SDValue can be passed. If hasMemory is true it means one of the asm constraint of the inline asm instruction being processed is 'm'.

ComputeConstraintToUse - Determines the constraint code and constraint type to use for the specific AsmOperandInfo, setting OpInfo.ConstraintCode and OpInfo.ConstraintType.

Definition at line 2242 of file TargetLowering.cpp.

References llvm::TargetLowering::AsmOperandInfo::CallOperandVal, ChooseConstraint(), llvm::InlineAsm::ConstraintInfo::Codes, llvm::TargetLowering::AsmOperandInfo::ConstraintCode, llvm::TargetLowering::AsmOperandInfo::ConstraintType, llvm::TargetLowering::AsmOperandInfo::ConstraintVT, getConstraintType(), and LowerXConstraint().

Referenced by IsOperandAMemoryOperand().

TargetLowering::ConstraintType TargetLowering::getConstraintType ( const std::string & Constraint ) const [virtual]

getConstraintType - Given a constraint, return the type of constraint it is for this target.

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, and llvm::X86TargetLowering.

Definition at line 1992 of file TargetLowering.cpp.

References C_Memory, C_Other, C_Register, C_RegisterClass, and C_Unknown.

Referenced by ChooseConstraint(), ComputeConstraintToUse(), llvm::X86TargetLowering::getConstraintType(), llvm::SPUTargetLowering::getConstraintType(), llvm::SparcTargetLowering::getConstraintType(), llvm::PPCTargetLowering::getConstraintType(), llvm::ARMTargetLowering::getConstraintType(), llvm::AlphaTargetLowering::getConstraintType(), and hasInlineAsmMemConstraint().

std::vector< unsigned > TargetLowering::getRegClassForInlineAsmConstraint	(	const std::string &	Constraint,
		MVT	VT
	)			const `[virtual]`

getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"), return a list of registers that can be used to satisfy the constraint. This should only be used for C_RegisterClass constraints.

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::SparcTargetLowering, and llvm::X86TargetLowering.

Definition at line 2096 of file TargetLowering.cpp.

Referenced by llvm::SelectionDAGLowering::GetRegistersForValue().

std::pair< unsigned, const TargetRegisterClass * > TargetLowering::getRegForInlineAsmConstraint	(	const std::string &	Constraint,
		MVT	VT
	)			const `[virtual]`

getRegForInlineAsmConstraint - Given a physical register constraint (e.g. {edx}), return the register number and the register class for the register.

Given a register class constraint, like 'r', if this corresponds directly to an LLVM register class, return a register of 0 and the register class pointer.

This should only be used for C_Register constraints. On error, this returns a register number of 0 and a null register class pointer..

Reimplemented in llvm::ARMTargetLowering, llvm::SPUTargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, and llvm::X86TargetLowering.

Definition at line 2103 of file TargetLowering.cpp.

References llvm::TargetRegisterClass::begin(), E, llvm::TargetRegisterClass::end(), llvm::TargetMachine::getRegisterInfo(), isTypeLegal(), llvm::StringsEqualNoCase(), llvm::TargetRegisterClass::vt_begin(), and llvm::TargetRegisterClass::vt_end().

Referenced by llvm::X86TargetLowering::getRegForInlineAsmConstraint(), llvm::SPUTargetLowering::getRegForInlineAsmConstraint(), llvm::SparcTargetLowering::getRegForInlineAsmConstraint(), llvm::PPCTargetLowering::getRegForInlineAsmConstraint(), llvm::ARMTargetLowering::getRegForInlineAsmConstraint(), and llvm::SelectionDAGLowering::GetRegistersForValue().

const char * TargetLowering::LowerXConstraint ( MVT ConstraintVT ) const [virtual]

LowerXConstraint - try to replace an X constraint, which matches anything, with another that has more specific requirements based on the type of the corresponding operand. This returns null if there is no replacement to make.

LowerXConstraint - try to replace an X constraint, which matches anything, with another that has more specific requirements based on the type of the corresponding operand.

Reimplemented in llvm::X86TargetLowering.

Definition at line 2027 of file TargetLowering.cpp.

References llvm::MVT::isFloatingPoint(), and llvm::MVT::isInteger().

Referenced by ComputeConstraintToUse(), and llvm::X86TargetLowering::LowerXConstraint().

void TargetLowering::LowerAsmOperandForConstraint	(	SDValue	Op,
		char	ConstraintLetter,
		bool	hasMemory,
		std::vector< SDValue > &	Ops,
		SelectionDAG &	DAG
	)			const `[virtual]`

LowerAsmOperandForConstraint - Lower the specified operand into the Ops vector. If it is invalid, don't add anything to Ops. If hasMemory is true it means one of the asm constraint of the inline asm instruction being processed is 'm'.

LowerAsmOperandForConstraint - Lower the specified operand into the Ops vector. If it is invalid, don't add anything to Ops.

Reimplemented in llvm::SPUTargetLowering, llvm::PPCTargetLowering, and llvm::X86TargetLowering.

Definition at line 2037 of file TargetLowering.cpp.

References llvm::ISD::ADD, llvm::ISD::BasicBlock, llvm::CallingConv::C, llvm::dyn_cast(), llvm::ConstantSDNode::getAPIntValue(), llvm::SDValue::getOpcode(), llvm::SDValue::getOperand(), llvm::SelectionDAG::getTargetConstant(), llvm::SelectionDAG::getTargetGlobalAddress(), llvm::SDValue::getValueType(), and llvm::ConstantSDNode::getZExtValue().

Referenced by ChooseConstraint(), llvm::X86TargetLowering::LowerAsmOperandForConstraint(), llvm::SPUTargetLowering::LowerAsmOperandForConstraint(), and llvm::PPCTargetLowering::LowerAsmOperandForConstraint().

MachineBasicBlock * TargetLowering::EmitInstrWithCustomInserter	(	MachineInstr *	MI,
		MachineBasicBlock *	MBB
	)			`[virtual]`

Reimplemented in llvm::AlphaTargetLowering, llvm::ARMTargetLowering, llvm::PIC16TargetLowering, llvm::PPCTargetLowering, llvm::SparcTargetLowering, llvm::X86TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 159 of file SelectionDAGISel.cpp.

References llvm::cerr().

Referenced by llvm::ScheduleDAGSDNodes::EmitNode().

bool TargetLowering::isLegalAddressingMode	(	const AddrMode &	AM,
		const Type *	Ty
	)			const `[virtual]`

isLegalAddressingMode - Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type. TODO: Handle pre/postinc as well.

isLegalAddressingMode - Return true if the addressing mode represented by AM is legal for this target, for a load/store of the specified type.

Reimplemented in llvm::ARMTargetLowering, llvm::PPCTargetLowering, llvm::X86TargetLowering, and llvm::XCoreTargetLowering.

Definition at line 2279 of file TargetLowering.cpp.

References llvm::TargetLowering::AddrMode::BaseGV, llvm::TargetLowering::AddrMode::BaseOffs, llvm::TargetLowering::AddrMode::HasBaseReg, and llvm::TargetLowering::AddrMode::Scale.

Referenced by fitsInAddressMode().

virtual bool llvm::TargetLowering::isTruncateFree	(	const Type *	Ty1,
		const Type *	Ty2
	)			const `[inline, virtual]`

isTruncateFree - Return true if it's free to truncate a value of type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in register EAX to i16 by referencing its sub-register AX.

Reimplemented in llvm::X86TargetLowering.

Definition at line 1379 of file TargetLowering.h.

Referenced by ExtendUsesToFormExtLoad().

virtual bool llvm::TargetLowering::isTruncateFree	(	MVT	VT1,
		MVT	VT2
	)			const `[inline, virtual]`

Reimplemented in llvm::X86TargetLowering.

Definition at line 1383 of file TargetLowering.h.

SDValue TargetLowering::BuildSDIV	(	SDNode *	N,
		SelectionDAG &	DAG,
		std::vector< SDNode * > *	Created
	)			const

BuildSDIVSequence - Given an ISD::SDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>

Definition at line 2414 of file TargetLowering.cpp.

References llvm::ISD::ADD, llvm::SelectionDAG::getConstant(), llvm::SDNode::getDebugLoc(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), getShiftAmountTy(), llvm::MVT::getSizeInBits(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), llvm::APInt::isNegative(), isOperationLegalOrCustom(), llvm::APInt::isStrictlyPositive(), isTypeLegal(), ms::m, magic(), llvm::ISD::MULHS, Q, ms::s, llvm::ISD::SMUL_LOHI, llvm::ISD::SRA, llvm::ISD::SRL, llvm::ISD::SUB, T, and VT.

Referenced by llvm::AlphaTargetLowering::LowerOperation().

SDValue TargetLowering::BuildUDIV	(	SDNode *	N,
		SelectionDAG &	DAG,
		std::vector< SDNode * > *	Created
	)			const

BuildUDIVSequence - Given an ISD::UDIV node expressing a divide by constant, return a DAG expression to select that will generate the same value by multiplying by a magic number. See: <http://the.wall.riscom.net/books/proc/ppc/cwg/code2.html>

Definition at line 2471 of file TargetLowering.cpp.

References llvm::ISD::ADD, llvm::ConstantSDNode::getAPIntValue(), llvm::APInt::getBitWidth(), llvm::SelectionDAG::getConstant(), llvm::SDNode::getDebugLoc(), llvm::SDValue::getNode(), llvm::SelectionDAG::getNode(), llvm::SDNode::getOperand(), getShiftAmountTy(), llvm::SDNode::getValueType(), llvm::SelectionDAG::getVTList(), isOperationLegalOrCustom(), isTypeLegal(), magicu(), llvm::ISD::MULHU, Q, llvm::ISD::SRL, llvm::ISD::SUB, llvm::ISD::UMUL_LOHI, and VT.

Referenced by llvm::AlphaTargetLowering::LowerOperation().

void llvm::TargetLowering::setLibcallName	(	RTLIB::Libcall	Call,
		const char *	Name
	)			`[inline]`

setLibcallName - Rename the default libcall routine name for the specified libcall.

Definition at line 1402 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), llvm::PIC16TargetLowering::PIC16TargetLowering(), llvm::PPCTargetLowering::PPCTargetLowering(), and llvm::SPUTargetLowering::SPUTargetLowering().

const char* llvm::TargetLowering::getLibcallName ( RTLIB::Libcall Call ) const [inline]

getLibcallName - Get the libcall routine name for the specified libcall.

Definition at line 1408 of file TargetLowering.h.

Referenced by ExpandLibCall().

void llvm::TargetLowering::setCmpLibcallCC	(	RTLIB::Libcall	Call,
		ISD::CondCode	CC
	)			`[inline]`

setCmpLibcallCC - Override the default CondCode to be used to test the result of the comparison libcall against zero.

Definition at line 1414 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering().

ISD::CondCode llvm::TargetLowering::getCmpLibcallCC ( RTLIB::Libcall Call ) const [inline]

getCmpLibcallCC - Get the CondCode that's to be used to test the result of the comparison libcall against zero.

Definition at line 1420 of file TargetLowering.h.

Member Data Documentation

unsigned llvm::TargetLowering::maxStoresPerMemset [protected]

Specify maximum number of store instructions per memset call.

When lowering .memset this field specifies the maximum number of store operations that may be substituted for the call to memset. Targets must set this value based on the cost threshold for that target. Targets should assume that the memset will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, storing 9 bytes on a 32-bit machine with 16-bit alignment would result in four 2-byte stores and one 1-byte store. This only applies to setting a constant array of a constant size.

Definition at line 1596 of file TargetLowering.h.

Referenced by getMaxStoresPerMemset(), TargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

unsigned llvm::TargetLowering::maxStoresPerMemcpy [protected]

Specify maximum bytes of store instructions per memcpy call.

When lowering .memcpy this field specifies the maximum number of store operations that may be substituted for a call to memcpy. Targets must set this value based on the cost threshold for that target. Targets should assume that the memcpy will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, storing 7 bytes on a 32-bit machine with 32-bit alignment would result in one 4-byte store, a one 2-byte store and one 1-byte store. This only applies to copying a constant array of constant size.

Definition at line 1608 of file TargetLowering.h.

Referenced by llvm::ARMTargetLowering::ARMTargetLowering(), getMaxStoresPerMemcpy(), TargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

unsigned llvm::TargetLowering::maxStoresPerMemmove [protected]

Specify maximum bytes of store instructions per memmove call.

When lowering .memmove this field specifies the maximum number of store instructions that may be substituted for a call to memmove. Targets must set this value based on the cost threshold for that target. Targets should assume that the memmove will be done using as many of the largest store operations first, followed by smaller ones, if necessary, per alignment restrictions. For example, moving 9 bytes on a 32-bit machine with 8-bit alignment would result in nine 1-byte stores. This only applies to copying a constant array of constant size.

Definition at line 1619 of file TargetLowering.h.

Referenced by getMaxStoresPerMemmove(), TargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

bool llvm::TargetLowering::allowUnalignedMemoryAccesses [protected]

Indicate whether the target permits unaligned memory accesses.

This field specifies whether the target machine permits unaligned memory accesses. This is used, for example, to determine the size of store operations when copying small arrays and other similar tasks.

Definition at line 1625 of file TargetLowering.h.

Referenced by allowsUnalignedMemoryAccesses(), TargetLowering(), and llvm::X86TargetLowering::X86TargetLowering().

The documentation for this class was generated from the following files:


Public Types
enum	LegalizeAction { Legal, Promote, Expand, Custom }
enum	OutOfRangeShiftAmount { Undefined, Mask, Extend }
enum	BooleanContent { UndefinedBooleanContent, ZeroOrOneBooleanContent, ZeroOrNegativeOneBooleanContent }
enum	SchedPreference { SchedulingForLatency, SchedulingForRegPressure }
enum	ConstraintType { C_Register, C_RegisterClass, C_Memory, C_Other, C_Unknown }
typedef struct llvm::TargetLowering::IntrinsicInfo	IntrinisicInfo
typedef std::vector< APFloat > ::const_iterator	legal_fpimm_iterator
typedef std::vector< ArgListEntry >	ArgListTy
Public Member Functions
	TargetLowering (TargetMachine &TM)
virtual	~TargetLowering ()
TargetMachine &	getTargetMachine () const
const TargetData *	getTargetData () const
bool	isBigEndian () const
bool	isLittleEndian () const
MVT	getPointerTy () const
MVT	getShiftAmountTy () const
OutOfRangeShiftAmount	getShiftAmountFlavor () const
bool	usesGlobalOffsetTable () const
bool	isSelectExpensive () const
bool	isIntDivCheap () const
bool	isPow2DivCheap () const
virtual MVT	getSetCCResultType (MVT VT) const
BooleanContent	getBooleanContents () const
SchedPreference	getSchedulingPreference () const
	getSchedulingPreference - Return target scheduling preference.
TargetRegisterClass *	getRegClassFor (MVT VT) const
bool	isTypeLegal (MVT VT) const
const ValueTypeActionImpl &	getValueTypeActions () const
LegalizeAction	getTypeAction (MVT VT) const
MVT	getTypeToTransformTo (MVT VT) const
MVT	getTypeToExpandTo (MVT VT) const
unsigned	getVectorTypeBreakdown (MVT VT, MVT &IntermediateVT, unsigned &NumIntermediates, MVT &RegisterVT) const
virtual bool	getTgtMemIntrinsic (IntrinsicInfo &Info, CallInst &I, unsigned Intrinsic)
virtual MVT	getWidenVectorType (MVT VT) const
legal_fpimm_iterator	legal_fpimm_begin () const
legal_fpimm_iterator	legal_fpimm_end () const
virtual bool	isShuffleMaskLegal (SDValue Mask, MVT VT) const
virtual bool	isVectorClearMaskLegal (const std::vector< SDValue > &BVOps, MVT EVT, SelectionDAG &DAG) const
LegalizeAction	getOperationAction (unsigned Op, MVT VT) const
bool	isOperationLegalOrCustom (unsigned Op, MVT VT) const
bool	isOperationLegal (unsigned Op, MVT VT) const
LegalizeAction	getLoadExtAction (unsigned LType, MVT VT) const
bool	isLoadExtLegal (unsigned LType, MVT VT) const
LegalizeAction	getTruncStoreAction (MVT ValVT, MVT MemVT) const
bool	isTruncStoreLegal (MVT ValVT, MVT MemVT) const
LegalizeAction	getIndexedLoadAction (unsigned IdxMode, MVT VT) const
bool	isIndexedLoadLegal (unsigned IdxMode, MVT VT) const
LegalizeAction	getIndexedStoreAction (unsigned IdxMode, MVT VT) const
bool	isIndexedStoreLegal (unsigned IdxMode, MVT VT) const
LegalizeAction	getConvertAction (MVT FromVT, MVT ToVT) const
bool	isConvertLegal (MVT FromVT, MVT ToVT) const
LegalizeAction	getCondCodeAction (ISD::CondCode CC, MVT VT) const
bool	isCondCodeLegal (ISD::CondCode CC, MVT VT) const
MVT	getTypeToPromoteTo (unsigned Op, MVT VT) const
MVT	getValueType (const Type *Ty, bool AllowUnknown=false) const
virtual unsigned	getByValTypeAlignment (const Type *Ty) const
MVT	getRegisterType (MVT VT) const
unsigned	getNumRegisters (MVT VT) const
virtual bool	ShouldShrinkFPConstant (MVT VT) const
bool	hasTargetDAGCombine (ISD::NodeType NT) const
unsigned	getMaxStoresPerMemset () const
	Get maximum # of store operations permitted for llvm.memset.
unsigned	getMaxStoresPerMemcpy () const
	Get maximum # of store operations permitted for llvm.memcpy.
unsigned	getMaxStoresPerMemmove () const
	Get maximum # of store operations permitted for llvm.memmove.
bool	allowsUnalignedMemoryAccesses () const
	Determine if the target supports unaligned memory accesses.
virtual MVT	getOptimalMemOpType (uint64_t Size, unsigned Align, bool isSrcConst, bool isSrcStr) const
bool	usesUnderscoreSetJmp () const
bool	usesUnderscoreLongJmp () const
unsigned	getStackPointerRegisterToSaveRestore () const
unsigned	getExceptionAddressRegister () const
unsigned	getExceptionSelectorRegister () const
unsigned	getJumpBufSize () const
unsigned	getJumpBufAlignment () const
unsigned	getIfCvtBlockSizeLimit () const
unsigned	getIfCvtDupBlockSizeLimit () const
unsigned	getPrefLoopAlignment () const
virtual bool	getPreIndexedAddressParts (SDNode *N, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const
virtual bool	getPostIndexedAddressParts (SDNode N, SDNode Op, SDValue &Base, SDValue &Offset, ISD::MemIndexedMode &AM, SelectionDAG &DAG) const
virtual SDValue	getPICJumpTableRelocBase (SDValue Table, SelectionDAG &DAG) const
virtual bool	isOffsetFoldingLegal (const GlobalAddressSDNode *GA) const
bool	SimplifyDemandedBits (SDValue Op, const APInt &DemandedMask, APInt &KnownZero, APInt &KnownOne, TargetLoweringOpt &TLO, unsigned Depth=0) const
virtual void	computeMaskedBitsForTargetNode (const SDValue Op, const APInt &Mask, APInt &KnownZero, APInt &KnownOne, const SelectionDAG &DAG, unsigned Depth=0) const
virtual unsigned	ComputeNumSignBitsForTargetNode (SDValue Op, unsigned Depth=0) const
SDValue	SimplifySetCC (MVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, DebugLoc dl) const
virtual bool	isGAPlusOffset (SDNode N, GlobalValue &GA, int64_t &Offset) const
bool	isConsecutiveLoad (SDNode LD, SDNode Base, unsigned Bytes, int Dist, const MachineFrameInfo *MFI) const
virtual SDValue	PerformDAGCombine (SDNode *N, DAGCombinerInfo &DCI) const
virtual const TargetSubtarget *	getSubtarget ()
virtual void	LowerArguments (Function &F, SelectionDAG &DAG, SmallVectorImpl< SDValue > &ArgValues, DebugLoc dl)
virtual std::pair< SDValue, SDValue >	LowerCallTo (SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt, bool isVarArg, bool isInreg, unsigned CallingConv, bool isTailCall, SDValue Callee, ArgListTy &Args, SelectionDAG &DAG, DebugLoc dl)
virtual SDValue	EmitTargetCodeForMemcpy (SelectionDAG &DAG, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, bool AlwaysInline, const Value DstSV, uint64_t DstOff, const Value SrcSV, uint64_t SrcOff)
virtual SDValue	EmitTargetCodeForMemmove (SelectionDAG &DAG, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, const Value DstSV, uint64_t DstOff, const Value SrcSV, uint64_t SrcOff)
virtual SDValue	EmitTargetCodeForMemset (SelectionDAG &DAG, SDValue Chain, SDValue Op1, SDValue Op2, SDValue Op3, unsigned Align, const Value *DstSV, uint64_t DstOff)
virtual void	LowerOperationWrapper (SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG)
virtual SDValue	LowerOperation (SDValue Op, SelectionDAG &DAG)
virtual void	ReplaceNodeResults (SDNode *N, SmallVectorImpl< SDValue > &Results, SelectionDAG &DAG)
virtual bool	IsEligibleForTailCallOptimization (CallSDNode *Call, SDValue Ret, SelectionDAG &DAG) const
virtual const char *	getTargetNodeName (unsigned Opcode) const
virtual FastISel *	createFastISel (MachineFunction &, MachineModuleInfo , DwarfWriter , DenseMap< const Value , unsigned > &, DenseMap< const BasicBlock , MachineBasicBlock * > &, DenseMap< const AllocaInst , int > &, SmallSet< Instruction , 8 > &CatchInfoLost)
virtual void	ComputeConstraintToUse (AsmOperandInfo &OpInfo, SDValue Op, bool hasMemory, SelectionDAG *DAG=0) const
virtual ConstraintType	getConstraintType (const std::string &Constraint) const
virtual std::vector< unsigned >	getRegClassForInlineAsmConstraint (const std::string &Constraint, MVT VT) const
virtual std::pair< unsigned, const TargetRegisterClass * >	getRegForInlineAsmConstraint (const std::string &Constraint, MVT VT) const
virtual const char *	LowerXConstraint (MVT ConstraintVT) const
virtual void	LowerAsmOperandForConstraint (SDValue Op, char ConstraintLetter, bool hasMemory, std::vector< SDValue > &Ops, SelectionDAG &DAG) const
virtual MachineBasicBlock *	EmitInstrWithCustomInserter (MachineInstr MI, MachineBasicBlock MBB)
virtual bool	isLegalAddressingMode (const AddrMode &AM, const Type *Ty) const
virtual bool	isTruncateFree (const Type Ty1, const Type Ty2) const
virtual bool	isTruncateFree (MVT VT1, MVT VT2) const
SDValue	BuildSDIV (SDNode N, SelectionDAG &DAG, std::vector< SDNode > *Created) const
SDValue	BuildUDIV (SDNode N, SelectionDAG &DAG, std::vector< SDNode > *Created) const
void	setLibcallName (RTLIB::Libcall Call, const char *Name)
const char *	getLibcallName (RTLIB::Libcall Call) const
void	setCmpLibcallCC (RTLIB::Libcall Call, ISD::CondCode CC)
ISD::CondCode	getCmpLibcallCC (RTLIB::Libcall Call) const
Static Public Member Functions
static bool	CheckTailCallReturnConstraints (CallSDNode *TheCall, SDValue Ret)
static SDValue	GetPossiblePreceedingTailCall (SDValue Chain, unsigned TailCallNodeOpCode)
Protected Member Functions
void	setUsesGlobalOffsetTable (bool V)
void	setShiftAmountType (MVT VT)
void	setBooleanContents (BooleanContent Ty)
void	setSchedulingPreference (SchedPreference Pref)
	setSchedulingPreference - Specify the target scheduling preference.
void	setShiftAmountFlavor (OutOfRangeShiftAmount OORSA)
void	setUseUnderscoreSetJmp (bool Val)
void	setUseUnderscoreLongJmp (bool Val)
void	setStackPointerRegisterToSaveRestore (unsigned R)
void	setExceptionPointerRegister (unsigned R)
void	setExceptionSelectorRegister (unsigned R)
void	setSelectIsExpensive ()
void	setIntDivIsCheap (bool isCheap=true)
void	setPow2DivIsCheap (bool isCheap=true)
void	addRegisterClass (MVT VT, TargetRegisterClass *RC)
void	computeRegisterProperties ()
void	setOperationAction (unsigned Op, MVT VT, LegalizeAction Action)
void	setLoadExtAction (unsigned ExtType, MVT VT, LegalizeAction Action)
void	setTruncStoreAction (MVT ValVT, MVT MemVT, LegalizeAction Action)
void	setIndexedLoadAction (unsigned IdxMode, MVT VT, LegalizeAction Action)
void	setIndexedStoreAction (unsigned IdxMode, MVT VT, LegalizeAction Action)
void	setConvertAction (MVT FromVT, MVT ToVT, LegalizeAction Action)
void	setCondCodeAction (ISD::CondCode CC, MVT VT, LegalizeAction Action)
void	AddPromotedToType (unsigned Opc, MVT OrigVT, MVT DestVT)
void	addLegalFPImmediate (const APFloat &Imm)
void	setTargetDAGCombine (ISD::NodeType NT)
void	setJumpBufSize (unsigned Size)
void	setJumpBufAlignment (unsigned Align)
void	setIfCvtBlockSizeLimit (unsigned Limit)
void	setIfCvtDupBlockSizeLimit (unsigned Limit)
void	setPrefLoopAlignment (unsigned Align)
Protected Attributes
unsigned	maxStoresPerMemset
	Specify maximum number of store instructions per memset call.
unsigned	maxStoresPerMemcpy
	Specify maximum bytes of store instructions per memcpy call.
unsigned	maxStoresPerMemmove
	Specify maximum bytes of store instructions per memmove call.
bool	allowUnalignedMemoryAccesses
	Indicate whether the target permits unaligned memory accesses.
Classes
struct	AddrMode
struct	ArgListEntry
struct	AsmOperandInfo
struct	DAGCombinerInfo
struct	IntrinsicInfo
struct	TargetLoweringOpt
class	ValueTypeActionImpl

llvm::TargetLowering Class Reference

Public Types

Public Member Functions

Static Public Member Functions

Protected Member Functions

Protected Attributes

Classes

Detailed Description

Member Typedef Documentation

Member Enumeration Documentation

Constructor & Destructor Documentation

Member Function Documentation

Member Data Documentation