llvm::ARMII Namespace Reference

Enumerations
enum	{   AddrModeMask = 0xf, AddrModeNone = 0, AddrMode1 = 1, AddrMode2 = 2,   AddrMode3 = 3, AddrMode4 = 4, AddrMode5 = 5, AddrModeT1 = 6,   AddrModeT2 = 7, AddrModeT4 = 8, AddrModeTs = 9, SizeShift = 4,   SizeMask = 7 << SizeShift, SizeSpecial = 1, Size8Bytes = 2, Size4Bytes = 3,   Size2Bytes = 4, IndexModeShift = 7, IndexModeMask = 3 << IndexModeShift, IndexModePre = 1,   IndexModePost = 2, UnaryDP = 1 << 9, FormShift = 10, FormMask = 0x1f << FormShift,   Pseudo = 0 << FormShift, MulFrm = 1 << FormShift, BrFrm = 2 << FormShift, BrMiscFrm = 3 << FormShift,   DPFrm = 4 << FormShift, DPSoRegFrm = 5 << FormShift, LdFrm = 6 << FormShift, StFrm = 7 << FormShift,   LdMiscFrm = 8 << FormShift, StMiscFrm = 9 << FormShift, LdStMulFrm = 10 << FormShift, ArithMiscFrm = 11 << FormShift,   ExtFrm = 12 << FormShift, VFPUnaryFrm = 13 << FormShift, VFPBinaryFrm = 14 << FormShift, VFPConv1Frm = 15 << FormShift,   VFPConv2Frm = 16 << FormShift, VFPConv3Frm = 17 << FormShift, VFPConv4Frm = 18 << FormShift, VFPConv5Frm = 19 << FormShift,   VFPLdStFrm = 20 << FormShift, VFPLdStMulFrm = 21 << FormShift, VFPMiscFrm = 22 << FormShift, ThumbFrm = 23 << FormShift,   M_BitShift = 5, ShiftImmShift = 5, ShiftShift = 7, N_BitShift = 7,   ImmHiShift = 8, SoRotImmShift = 8, RegRsShift = 8, ExtRotImmShift = 10,   RegRdLoShift = 12, RegRdShift = 12, RegRdHiShift = 16, RegRnShift = 16,   S_BitShift = 20, W_BitShift = 21, AM3_I_BitShift = 22, D_BitShift = 22,   U_BitShift = 23, P_BitShift = 24, I_BitShift = 25, CondShift = 28 }

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Detailed Description

ARMII - This namespace holds all of the target specific flags that instruction info tracks.

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Enumeration Type Documentation

anonymous enum

Enumerator:

AddrModeMask
AddrModeNone
AddrMode1
AddrMode2
AddrMode3
AddrMode4
AddrMode5
AddrModeT1
AddrModeT2
AddrModeT4
AddrModeTs
SizeShift
SizeMask
SizeSpecial
Size8Bytes
Size4Bytes
Size2Bytes
IndexModeShift
IndexModeMask
IndexModePre
IndexModePost
UnaryDP
FormShift
FormMask
Pseudo
MulFrm
BrFrm
BrMiscFrm
DPFrm
DPSoRegFrm
LdFrm
StFrm
LdMiscFrm
StMiscFrm
LdStMulFrm
ArithMiscFrm
ExtFrm
VFPUnaryFrm
VFPBinaryFrm
VFPConv1Frm
VFPConv2Frm
VFPConv3Frm
VFPConv4Frm
VFPConv5Frm
VFPLdStFrm
VFPLdStMulFrm
VFPMiscFrm
ThumbFrm
M_BitShift
ShiftImmShift
ShiftShift
N_BitShift
ImmHiShift
SoRotImmShift
RegRsShift
ExtRotImmShift
RegRdLoShift
RegRdShift
RegRdHiShift
RegRnShift
S_BitShift
W_BitShift
AM3_I_BitShift
D_BitShift
U_BitShift
P_BitShift
I_BitShift
CondShift

Definition at line 28 of file ARMInstrInfo.h.