1.5.6Copyright © 2003-2007 University of Illinois at Urbana-Champaign. All Rights Reserved.
LLVM API Documentation
| enum llvm::ISD::CondCode |
ISD::CondCode enum - These are ordered carefully to make the bitfields below work out, when considering SETFALSE (something that never exists dynamically) as 0. "U" -> Unsigned (for integer operands) or Unordered (for floating point), "L" -> Less than, "G" -> Greater than, "E" -> Equal to. If the "N" column is 1, the result of the comparison is undefined if the input is a NAN.
All of these (except for the 'always folded ops') should be handled for floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, SETGE,SETULT,SETULE,SETUGT, and SETUGE opcodes are used.
Note that these are laid out in a specific order to allow bit-twiddling to transform conditions.
| SETFALSE | |
| SETOEQ | |
| SETOGT | |
| SETOGE | |
| SETOLT | |
| SETOLE | |
| SETONE | |
| SETO | |
| SETUO | |
| SETUEQ | |
| SETUGT | |
| SETUGE | |
| SETULT | |
| SETULE | |
| SETUNE | |
| SETTRUE | |
| SETFALSE2 | |
| SETEQ | |
| SETGT | |
| SETGE | |
| SETLT | |
| SETLE | |
| SETNE | |
| SETTRUE2 | |
| SETCC_INVALID |
Definition at line 758 of file SelectionDAGNodes.h.
| enum llvm::ISD::CvtCode |
CvtCode enum - This enum defines the various converts CONVERT_RNDSAT supports.
Definition at line 839 of file SelectionDAGNodes.h.
LoadExtType enum - This enum defines the three variants of LOADEXT (load with extension).
SEXTLOAD loads the integer operand and sign extends it to a larger integer result type. ZEXTLOAD loads the integer operand and zero extends it to a larger integer result type. EXTLOAD is used for three things: floating point extending loads, integer extending loads [the top bits are undefined], and vector extending loads [load into low elt].
Definition at line 736 of file SelectionDAGNodes.h.
MemIndexedMode enum - This enum defines the load / store indexed addressing modes.
UNINDEXED "Normal" load / store. The effective address is already computed and is available in the base pointer. The offset operand is always undefined. In addition to producing a chain, an unindexed load produces one value (result of the load); an unindexed store does not produce a value.
PRE_INC Similar to the unindexed mode where the effective address is PRE_DEC the value of the base pointer add / subtract the offset. It considers the computation as being folded into the load / store operation (i.e. the load / store does the address computation as well as performing the memory transaction). The base operand is always undefined. In addition to producing a chain, pre-indexed load produces two values (result of the load and the result of the address computation); a pre-indexed store produces one value (result of the address computation).
POST_INC The effective address is the value of the base pointer. The POST_DEC value of the offset operand is then added to / subtracted from the base after memory transaction. In addition to producing a chain, post-indexed load produces two values (the result of the load and the result of the base +/- offset computation); a post-indexed store produces one value (the the result of the base +/- offset computation).
Definition at line 715 of file SelectionDAGNodes.h.
| enum llvm::ISD::NodeType |
ISD::NodeType enum - This enum defines the target-independent operators for a SelectionDAG.
Targets may also define target-dependent operator codes for SDNodes. For example, on x86, these are the enum values in the X86ISD namespace. Targets should aim to use target-independent operators to model their instruction sets as much as possible, and only use target-dependent operators when they have special requirements.
Finally, during and after selection proper, SNodes may use special operator codes that correspond directly with MachineInstr opcodes. These are used to represent selected instructions. See the isMachineOpcode() and getMachineOpcode() member functions of SDNode.
| DELETED_NODE | |
| EntryToken | |
| TokenFactor | |
| AssertSext | |
| AssertZext | |
| BasicBlock | |
| VALUETYPE | |
| ARG_FLAGS | |
| CONDCODE | |
| Register | |
| Constant | |
| ConstantFP | |
| GlobalAddress | |
| GlobalTLSAddress | |
| FrameIndex | |
| JumpTable | |
| ConstantPool | |
| ExternalSymbol | |
| GLOBAL_OFFSET_TABLE | |
| FRAMEADDR | |
| RETURNADDR | |
| FRAME_TO_ARGS_OFFSET | |
| EXCEPTIONADDR | |
| EHSELECTION | |
| EH_RETURN | |
| TargetConstant | |
| TargetConstantFP | |
| TargetGlobalAddress | |
| TargetGlobalTLSAddress | |
| TargetFrameIndex | |
| TargetJumpTable | |
| TargetConstantPool | |
| TargetExternalSymbol | |
| INTRINSIC_WO_CHAIN | RESULT = INTRINSIC_WO_CHAIN(INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with no side effects. The first operand is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node has returns the result of the intrinsic. |
| INTRINSIC_W_CHAIN | RESULT,OUTCHAIN = INTRINSIC_W_CHAIN(INCHAIN, INTRINSICID, arg1, ...) This node represents a target intrinsic function with side effects that returns a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. The node has two results, the result of the intrinsic and an output chain. |
| INTRINSIC_VOID | OUTCHAIN = INTRINSIC_VOID(INCHAIN, INTRINSICID, arg1, arg2, ...) This node represents a target intrinsic function with side effects that does not return a result. The first operand is a chain pointer. The second is the ID number of the intrinsic from the llvm::Intrinsic namespace. The operands to the intrinsic follow. |
| CopyToReg | |
| CopyFromReg | |
| UNDEF | |
| FORMAL_ARGUMENTS | FORMAL_ARGUMENTS(CHAIN, CC#, ISVARARG, FLAG0, ..., FLAGn) - This node represents the formal arguments for a function. CC# is a Constant value indicating the calling convention of the function, and ISVARARG is a flag that indicates whether the function is varargs or not. This node has one result value for each incoming argument, plus one for the output chain. It must be custom legalized. See description of CALL node for FLAG argument contents explanation. |
| CALL |
RV1, RV2...RVn, CHAIN = CALL(CHAIN, CALLEE, ARG0, FLAG0, ARG1, FLAG1, ... ARGn, FLAGn) This node represents a fully general function call, before the legalizer runs. This has one result value for each argument / flag pair, plus a chain result. It must be custom legalized. Flag argument indicates misc. argument attributes. Currently: Bit 0 - signness Bit 1 - 'inreg' attribute Bit 2 - 'sret' attribute Bit 4 - 'byval' attribute Bit 5 - 'nest' attribute Bit 6-9 - alignment of byval structures Bit 10-26 - size of byval structures Bits 31:27 - argument ABI alignment in the first argument piece and alignment '1' in other argument pieces. CALL nodes use the CallSDNode subclass of SDNode, which additionally carries information about the calling convention, whether the call is varargs, and if it's marked as a tail call. |
| EXTRACT_ELEMENT | |
| BUILD_PAIR | |
| MERGE_VALUES | |
| ADD | |
| SUB | |
| MUL | |
| SDIV | |
| UDIV | |
| SREM | |
| UREM | |
| SMUL_LOHI | |
| UMUL_LOHI | |
| SDIVREM | |
| UDIVREM | |
| CARRY_FALSE | |
| ADDC | |
| SUBC | |
| ADDE | |
| SUBE | |
| SADDO | |
| UADDO | |
| SSUBO | |
| USUBO | |
| SMULO | |
| UMULO | |
| FADD | |
| FSUB | |
| FMUL | |
| FDIV | |
| FREM | |
| FCOPYSIGN | |
| FGETSIGN | |
| BUILD_VECTOR | BUILD_VECTOR(ELT0, ELT1, ELT2, ELT3,...) - Return a vector with the specified, possibly variable, elements. The number of elements is required to be a power of two. |
| INSERT_VECTOR_ELT | INSERT_VECTOR_ELT(VECTOR, VAL, IDX) - Returns VECTOR with the element at IDX replaced with VAL. If the type of VAL is larger than the vector element type then VAL is truncated before replacement. |
| EXTRACT_VECTOR_ELT | EXTRACT_VECTOR_ELT(VECTOR, IDX) - Returns a single element from VECTOR identified by the (potentially variable) element number IDX. |
| CONCAT_VECTORS | CONCAT_VECTORS(VECTOR0, VECTOR1, ...) - Given a number of values of vector type with the same length and element type, this produces a concatenated vector result value, with length equal to the sum of the lengths of the input vectors. |
| EXTRACT_SUBVECTOR | EXTRACT_SUBVECTOR(VECTOR, IDX) - Returns a subvector from VECTOR (an vector value) starting with the (potentially variable) element number IDX, which must be a multiple of the result vector length. |
| VECTOR_SHUFFLE | VECTOR_SHUFFLE(VEC1, VEC2, SHUFFLEVEC) - Returns a vector, of the same type as VEC1/VEC2. SHUFFLEVEC is a BUILD_VECTOR of constant int values (maybe of an illegal datatype) or undef that indicate which value each result element will get. The elements of VEC1/VEC2 are enumerated in order. This is quite similar to the Altivec 'vperm' instruction, except that the indices must be constants and are in terms of the element size of VEC1/VEC2, not in terms of bytes. |
| SCALAR_TO_VECTOR | SCALAR_TO_VECTOR(VAL) - This represents the operation of loading a scalar value into element 0 of the resultant vector type. The top elements 1 to N-1 of the N-element vector are undefined. |
| EXTRACT_SUBREG | |
| INSERT_SUBREG | |
| MULHU | |
| MULHS | |
| AND | |
| OR | |
| XOR | |
| SHL | |
| SRA | |
| SRL | |
| ROTL | |
| ROTR | |
| BSWAP | |
| CTTZ | |
| CTLZ | |
| CTPOP | |
| SELECT | |
| SELECT_CC | |
| SETCC | |
| VSETCC | |
| SHL_PARTS | |
| SRA_PARTS | |
| SRL_PARTS | |
| SIGN_EXTEND | |
| ZERO_EXTEND | |
| ANY_EXTEND | |
| TRUNCATE | |
| SINT_TO_FP | |
| UINT_TO_FP | |
| SIGN_EXTEND_INREG | |
| FP_TO_SINT | FP_TO_[US]INT - Convert a floating point value to a signed or unsigned integer. |
| FP_TO_UINT | |
| FP_ROUND |
X = FP_ROUND(Y, TRUNC) - Rounding 'Y' from a larger floating point type down to the precision of the destination VT. TRUNC is a flag, which is always an integer that is zero or one. If TRUNC is 0, this is a normal rounding, if it is 1, this FP_ROUND is known to not change the value of Y. The TRUNC = 1 case is used in cases where we know that the value will not be modified by the node, because Y is not using any of the extra precision of source type. This allows certain transformations like FP_EXTEND(FP_ROUND(X,1)) -> X which are not safe for FP_EXTEND(FP_ROUND(X,0)) because the extra bits aren't removed. |
| FLT_ROUNDS_ | |
| FP_ROUND_INREG | X = FP_ROUND_INREG(Y, VT) - This operator takes an FP register, and rounds it to a floating point value. It then promotes it and returns it in a register of the same size. This operation effectively just discards excess precision. The type to round down to is specified by the VT operand, a VTSDNode. |
| FP_EXTEND | X = FP_EXTEND(Y) - Extend a smaller FP type into a larger FP type. |
| BIT_CONVERT | |
| CONVERT_RNDSAT | |
| FNEG | |
| FABS | |
| FSQRT | |
| FSIN | |
| FCOS | |
| FPOWI | |
| FPOW | |
| FLOG | |
| FLOG2 | |
| FLOG10 | |
| FEXP | |
| FEXP2 | |
| FCEIL | |
| FTRUNC | |
| FRINT | |
| FNEARBYINT | |
| FFLOOR | |
| LOAD | |
| STORE | |
| DYNAMIC_STACKALLOC | |
| BR | |
| BRIND | |
| BR_JT | |
| BRCOND | |
| BR_CC | |
| RET | |
| INLINEASM | |
| DBG_LABEL | |
| EH_LABEL | |
| DECLARE | |
| STACKSAVE | |
| STACKRESTORE | |
| CALLSEQ_START | |
| CALLSEQ_END | |
| VAARG | |
| VACOPY | |
| VAEND | |
| VASTART | |
| SRCVALUE | |
| MEMOPERAND | |
| PCMARKER | |
| READCYCLECOUNTER | |
| HANDLENODE | |
| DBG_STOPPOINT | |
| DEBUG_LOC | |
| TRAMPOLINE | |
| TRAP | |
| PREFETCH | |
| MEMBARRIER | |
| ATOMIC_CMP_SWAP | |
| ATOMIC_SWAP | |
| ATOMIC_LOAD_ADD | |
| ATOMIC_LOAD_SUB | |
| ATOMIC_LOAD_AND | |
| ATOMIC_LOAD_OR | |
| ATOMIC_LOAD_XOR | |
| ATOMIC_LOAD_NAND | |
| ATOMIC_LOAD_MIN | |
| ATOMIC_LOAD_MAX | |
| ATOMIC_LOAD_UMIN | |
| ATOMIC_LOAD_UMAX | |
| BUILTIN_OP_END |
Definition at line 77 of file SelectionDAGNodes.h.
| ISD::CondCode llvm::ISD::getSetCCAndOperation | ( | ISD::CondCode | Op1, | |
| ISD::CondCode | Op2, | |||
| bool | isInteger | |||
| ) |
getSetCCAndOperation - Return the result of a logical AND between different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This function returns SETCC_INVALID if it is not possible to represent the resultant comparison.
getSetCCAndOperation - Return the result of a logical AND between different comparisons of identical values: ((X op1 Y) & (X op2 Y)). This function returns zero if it is not possible to represent the resultant comparison.
Definition at line 286 of file SelectionDAG.cpp.
References isSignedOp(), SETCC_INVALID, SETEQ, SETFALSE, SETOEQ, SETOGT, SETOLT, SETUEQ, SETUGT, SETULT, and SETUO.
| ISD::CondCode llvm::ISD::getSetCCInverse | ( | ISD::CondCode | Op, | |
| bool | isInteger | |||
| ) |
getSetCCInverse - Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
getSetCCInverse - Return the operation corresponding to !(X op Y), where 'op' is a valid SetCC operation.
Definition at line 225 of file SelectionDAG.cpp.
References SETTRUE2.
Referenced by combineSelectAndUse(), and llvm::TargetLowering::SimplifySetCC().
| ISD::CondCode llvm::ISD::getSetCCOrOperation | ( | ISD::CondCode | Op1, | |
| ISD::CondCode | Op2, | |||
| bool | isInteger | |||
| ) |
getSetCCOrOperation - Return the result of a logical OR between different comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function returns SETCC_INVALID if it is not possible to represent the resultant comparison.
getSetCCOrOperation - Return the result of a logical OR between different comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function returns SETCC_INVALID if it is not possible to represent the resultant comparison.
Definition at line 262 of file SelectionDAG.cpp.
References isSignedOp(), Op, SETCC_INVALID, SETNE, SETTRUE2, and SETUNE.
| ISD::CondCode llvm::ISD::getSetCCSwappedOperands | ( | ISD::CondCode | Operation | ) |
getSetCCSwappedOperands - Return the operation corresponding to (Y op X) when given the operation for (X op Y).
getSetCCSwappedOperands - Return the operation corresponding to (Y op X) when given the operation for (X op Y).
Definition at line 213 of file SelectionDAG.cpp.
Referenced by llvm::SelectionDAG::FoldSetCC(), llvm::TargetLowering::SimplifySetCC(), and TranslateX86CC().
| unsigned llvm::ISD::getUnorderedFlavor | ( | CondCode | Cond | ) | [inline] |
getUnorderedFlavor - This function returns 0 if the condition is always false if an operand is a NaN, 1 if the condition is always true if the operand is a NaN, and 2 if the condition is undefined if the operand is a NaN.
Definition at line 812 of file SelectionDAGNodes.h.
Referenced by llvm::TargetLowering::SimplifySetCC().
| bool llvm::ISD::isBuildVectorAllOnes | ( | const SDNode * | N | ) |
Node predicates.
isBuildVectorAllOnes - Return true if the specified node is a BUILD_VECTOR where all of the elements are ~0 or undef.
isBuildVectorAllOnes - Return true if the specified node is a BUILD_VECTOR where all of the elements are ~0 or undef.
Definition at line 100 of file SelectionDAG.cpp.
References BIT_CONVERT, BUILD_VECTOR, llvm::SDValue::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), and UNDEF.
| bool llvm::ISD::isBuildVectorAllZeros | ( | const SDNode * | N | ) |
isBuildVectorAllZeros - Return true if the specified node is a BUILD_VECTOR where all of the elements are 0 or undef.
isBuildVectorAllZeros - Return true if the specified node is a BUILD_VECTOR where all of the elements are 0 or undef.
Definition at line 141 of file SelectionDAG.cpp.
References BIT_CONVERT, BUILD_VECTOR, llvm::SDValue::getNode(), llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), and UNDEF.
Referenced by isZeroShuffle().
| bool llvm::ISD::isDebugLabel | ( | const SDNode * | N | ) |
isDebugLabel - Return true if the specified node represents a debug label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
isDebugLabel - Return true if the specified node represents a debug label (i.e. ISD::DBG_LABEL or TargetInstrInfo::DBG_LABEL node).
Definition at line 201 of file SelectionDAG.cpp.
References llvm::TargetInstrInfo::DBG_LABEL, DBG_LABEL, llvm::SDNode::getMachineOpcode(), llvm::SDNode::getOpcode(), and llvm::SDNode::isMachineOpcode().
| bool llvm::ISD::isEXTLoad | ( | const SDNode * | N | ) | [inline] |
isEXTLoad - Returns true if the specified node is a EXTLOAD.
Definition at line 2554 of file SelectionDAGNodes.h.
References EXTLOAD.
Referenced by isFloatingPointZero().
| bool llvm::ISD::isNON_EXTLoad | ( | const SDNode * | N | ) | [inline] |
isNON_EXTLoad - Returns true if the specified node is a non-extending load.
Definition at line 2547 of file SelectionDAGNodes.h.
References NON_EXTLOAD.
Referenced by EltsFromConsecutiveLoads(), llvm::PIC16TargetLowering::ExpandLoad(), isFloatingPointZero(), isScalarLoadToVector(), llvm::PPCTargetLowering::PerformDAGCombine(), ShouldXformToMOVLP(), and TranslateX86CC().
| bool llvm::ISD::isNON_TRUNCStore | ( | const SDNode * | N | ) | [inline] |
isNON_TRUNCStore - Returns true if the specified node is a non-truncating store.
Definition at line 2590 of file SelectionDAGNodes.h.
| bool llvm::ISD::isNormalLoad | ( | const SDNode * | N | ) | [inline] |
isNormalLoad - Returns true if the specified node is a non-extending and unindexed load.
Definition at line 2539 of file SelectionDAGNodes.h.
References llvm::dyn_cast(), llvm::LSBaseSDNode::getAddressingMode(), llvm::LoadSDNode::getExtensionType(), NON_EXTLOAD, and UNINDEXED.
| bool llvm::ISD::isNormalStore | ( | const SDNode * | N | ) | [inline] |
isNormalStore - Returns true if the specified node is a non-truncating and unindexed store.
Definition at line 2582 of file SelectionDAGNodes.h.
References llvm::dyn_cast(), llvm::LSBaseSDNode::getAddressingMode(), llvm::StoreSDNode::isTruncatingStore(), and UNINDEXED.
| bool llvm::ISD::isScalarToVector | ( | const SDNode * | N | ) |
isScalarToVector - Return true if the specified node is a ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low element is not an undef.
isScalarToVector - Return true if the specified node is a ISD::SCALAR_TO_VECTOR node or a BUILD_VECTOR node where only the low element is not an undef.
Definition at line 181 of file SelectionDAG.cpp.
References BUILD_VECTOR, llvm::SDNode::getNumOperands(), llvm::SDValue::getOpcode(), llvm::SDNode::getOpcode(), llvm::SDNode::getOperand(), SCALAR_TO_VECTOR, UNDEF, and V.
| bool llvm::ISD::isSEXTLoad | ( | const SDNode * | N | ) | [inline] |
isSEXTLoad - Returns true if the specified node is a SEXTLOAD.
Definition at line 2561 of file SelectionDAGNodes.h.
References SEXTLOAD.
Referenced by llvm::PIC16TargetLowering::ExpandLoad(), llvm::ARMTargetLowering::getPostIndexedAddressParts(), and llvm::ARMTargetLowering::getPreIndexedAddressParts().
| bool llvm::ISD::isSignedIntSetCC | ( | CondCode | Code | ) | [inline] |
isSignedIntSetCC - Return true if this is a setcc instruction that performs a signed comparison when used with integer operands.
Definition at line 791 of file SelectionDAGNodes.h.
References SETGE, SETGT, SETLE, and SETLT.
Referenced by ExtendUsesToFormExtLoad(), and llvm::TargetLowering::SimplifySetCC().
| bool llvm::ISD::isTrueWhenEqual | ( | CondCode | Cond | ) | [inline] |
isTrueWhenEqual - Return true if the specified condition returns true if the two operands to the condition are equal. Note that if one of the two operands is a NaN, this value is meaningless.
Definition at line 804 of file SelectionDAGNodes.h.
Referenced by llvm::ICmpInst::isTrueWhenEqual(), and llvm::TargetLowering::SimplifySetCC().
| bool llvm::ISD::isTRUNCStore | ( | const SDNode * | N | ) | [inline] |
isTRUNCStore - Returns true if the specified node is a truncating store.
Definition at line 2596 of file SelectionDAGNodes.h.
| bool llvm::ISD::isUNINDEXEDLoad | ( | const SDNode * | N | ) | [inline] |
isUNINDEXEDLoad - Returns true if the specified node is an unindexed load.
Definition at line 2575 of file SelectionDAGNodes.h.
References UNINDEXED.
| bool llvm::ISD::isUNINDEXEDStore | ( | const SDNode * | N | ) | [inline] |
isUNINDEXEDStore - Returns true if the specified node is an unindexed store.
Definition at line 2602 of file SelectionDAGNodes.h.
References UNINDEXED.
| bool llvm::ISD::isUnsignedIntSetCC | ( | CondCode | Code | ) | [inline] |
| bool llvm::ISD::isZEXTLoad | ( | const SDNode * | N | ) | [inline] |
isZEXTLoad - Returns true if the specified node is a ZEXTLOAD.
Definition at line 2568 of file SelectionDAGNodes.h.
References ZEXTLOAD.
Referenced by llvm::SelectionDAG::ComputeMaskedBits(), and llvm::PIC16TargetLowering::ExpandLoad().
Generated on Thu Nov 5 23:54:07 2009 for LLVM by
1.5.6
Copyright © 2003-2007 University of Illinois at Urbana-Champaign.
All Rights Reserved.